diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/ast.h | 17 | ||||
| -rw-r--r-- | src/ast_driver.c | 21 | ||||
| -rw-r--r-- | src/ast_mode.c | 9 | ||||
| -rw-r--r-- | src/ast_vgatool.c | 4049 | ||||
| -rw-r--r-- | src/ast_vgatool.h | 4 |
5 files changed, 4046 insertions, 54 deletions
@@ -71,6 +71,13 @@ typedef enum _CHIP_ID { AST1180 } CHIP_ID; +typedef enum _TX_CHIPTYPE { + Tx_NONE, + Tx_Sil164, + Tx_Ite66121, + Tx_DP501 +} TX_CHIPTYPE; + /* AST REC Info */ #define AST_NAME "AST" #define AST_DRIVER_NAME "ast" @@ -88,6 +95,10 @@ typedef enum _CHIP_ID { #define CMD_QUEUE_GUARD_BAND 0x00000020 #define DEFAULT_HWC_NUM 0x00000002 +/* Customized Info. for DVO */ +#define HDMI_I2C_CHANNEL 1 +#define HDMI_TX_I2C_SLAVE_ADDR 0x98 + /* Patch Info */ #define ABI_VIDEODRV_VERSION_PATCH SET_ABI_VERSION(0, 5) @@ -240,7 +251,7 @@ typedef struct _ASTRec { Bool VGA2Clone; Bool SupportWideScreen; - ULONG FBPhysAddr; /* Frame buffer physical address */ + ULONG FBPhysAddr; /* Frame buffer physical address */ ULONG MMIOPhysAddr; /* MMIO region physical address */ ULONG BIOSPhysAddr; /* BIOS physical address */ @@ -269,6 +280,10 @@ typedef struct _ASTRec { int mon_h_active; /* Monitor Info. */ int mon_v_active; + UCHAR jTxChipType; /* 3rd TX */ + UCHAR DP501_MaxVCLK; + UCHAR *pDP501FWBufferVirtualAddress; + #ifdef AstVideo XF86VideoAdaptorPtr adaptor; Atom xvBrightness, xvContrast, xvColorKey, xvHue, xvSaturation; diff --git a/src/ast_driver.c b/src/ast_driver.c index e79577e..5f7fa8e 100644 --- a/src/ast_driver.c +++ b/src/ast_driver.c @@ -85,6 +85,9 @@ extern Bool bInitAST1180(ScrnInfoPtr pScrn); extern void GetAST1180DRAMInfo(ScrnInfoPtr pScrn); extern void vEnableASTVGAMMIO(ScrnInfoPtr pScrn); +extern Bool ReadEDID_M68K(ScrnInfoPtr pScrn, BYTE *pEDIDData); +extern UCHAR GetLinkMaxCLK(ScrnInfoPtr pScrn); + extern Bool bInitCMDQInfo(ScrnInfoPtr pScrn, ASTRecPtr pAST); extern Bool bEnableCMDQ(ScrnInfoPtr pScrn, ASTRecPtr pAST); extern void vDisable2D(ScrnInfoPtr pScrn, ASTRecPtr pAST); @@ -1286,10 +1289,14 @@ ASTGetRec(ScrnInfoPtr pScrn) static void ASTFreeRec(ScrnInfoPtr pScrn) { + ASTRecPtr pAST = ASTPTR(pScrn); + if (!pScrn) return; if (!pScrn->driverPrivate) return; + if (pAST->pDP501FWBufferVirtualAddress) + free(pAST->pDP501FWBufferVirtualAddress); free(pScrn->driverPrivate); pScrn->driverPrivate = 0; } @@ -1554,6 +1561,12 @@ ASTProbeDDC(ScrnInfoPtr pScrn, int index) { if (pAST->jChipType == AST1180) Flags = GetVGA2EDID(pScrn, DDC_data); + else if (pAST->jTxChipType == Tx_DP501) + { + Flags = ReadEDID_M68K(pScrn, DDC_data); + if (Flags == FALSE) + Flags = GetVGAEDID(pScrn, DDC_data); + } else Flags = GetVGAEDID(pScrn, DDC_data); @@ -1598,6 +1611,14 @@ ASTDoDDC(ScrnInfoPtr pScrn, int index) { if (pAST->jChipType == AST1180) Flags = GetVGA2EDID(pScrn, DDC_data); + else if (pAST->jTxChipType == Tx_DP501) + { + pAST->DP501_MaxVCLK = 0xFF; + Flags = ReadEDID_M68K(pScrn, DDC_data); + if (Flags) pAST->DP501_MaxVCLK = GetLinkMaxCLK(pScrn); + else + Flags = GetVGAEDID(pScrn, DDC_data); + } else Flags = GetVGAEDID(pScrn, DDC_data); diff --git a/src/ast_mode.c b/src/ast_mode.c index de6f4f1..964fe7a 100644 --- a/src/ast_mode.c +++ b/src/ast_mode.c @@ -413,8 +413,8 @@ VBIOS_DAC_INFO DAC_VGA[] = { /* extern. function */ extern void vASTOpenKey(ScrnInfoPtr pScrn); extern Bool bASTRegInit(ScrnInfoPtr pScrn); -extern void vAST1000DisplayOn(ASTRecPtr pAST); -extern void vAST1000DisplayOff(ASTRecPtr pAST); +extern void vAST1000DisplayOn(ScrnInfoPtr pScrn); +extern void vAST1000DisplayOff(ScrnInfoPtr pScrn); extern Bool bEnable2D(ScrnInfoPtr pScrn, ASTRecPtr pAST); extern void vDisable2D(ScrnInfoPtr pScrn, ASTRecPtr pAST); @@ -465,6 +465,8 @@ ASTSetMode(ScrnInfoPtr pScrn, DisplayModePtr mode) vASTOpenKey(pScrn); bASTRegInit(pScrn); + vAST1000DisplayOff(pScrn); + vSetStdReg(pScrn, mode, &vgamodeinfo); vSetCRTCReg(pScrn, mode, &vgamodeinfo); vSetOffsetReg(pScrn, mode, &vgamodeinfo); @@ -472,6 +474,8 @@ ASTSetMode(ScrnInfoPtr pScrn, DisplayModePtr mode) vSetExtReg(pScrn, mode, &vgamodeinfo); vSetSyncReg(pScrn, mode, &vgamodeinfo); bSetDACReg(pScrn, mode, &vgamodeinfo); + + vAST1000DisplayOn(pScrn); } /* post set mode */ @@ -491,7 +495,6 @@ ASTSetMode(ScrnInfoPtr pScrn, DisplayModePtr mode) } } #endif - vAST1000DisplayOn(pAST); return (TRUE); } diff --git a/src/ast_vgatool.c b/src/ast_vgatool.c index ccbe986..73d379c 100644 --- a/src/ast_vgatool.c +++ b/src/ast_vgatool.c @@ -54,6 +54,36 @@ /* Driver specific headers */ #include "ast.h" + +__inline ULONG MIndwm(UCHAR *mmiobase, ULONG r) +{ + ULONG ulData; + + *(ULONG *) (mmiobase + 0xF004) = r & 0xFFFF0000; + *(ULONG *) (mmiobase + 0xF000) = 0x1; + + do { + ulData = *(volatile ULONG *) (mmiobase + 0xF004) & 0xFFFF0000; + } while (ulData != (r & 0xFFFF0000) ); + + return ( *(volatile ULONG *) (mmiobase + 0x10000 + (r & 0x0000FFFF)) ); + +} + +__inline void MOutdwm(UCHAR *mmiobase, ULONG r, ULONG v) +{ + ULONG ulData; + + *(ULONG *) (mmiobase + 0xF004) = r & 0xFFFF0000; + *(ULONG *) (mmiobase + 0xF000) = 0x1; + + do { + ulData = *(volatile ULONG *) (mmiobase + 0xF004) & 0xFFFF0000; + } while (ulData != (r & 0xFFFF0000) ); + + *(volatile ULONG *) (mmiobase + 0x10000 + (r & 0x0000FFFF)) = v; +} + /* Prototype type declaration*/ void vASTOpenKey(ScrnInfoPtr pScrn); Bool bASTRegInit(ScrnInfoPtr pScrn); @@ -62,8 +92,8 @@ ULONG GetVRAMInfo(ScrnInfoPtr pScrn); ULONG GetMaxDCLK(ScrnInfoPtr pScrn); void GetChipType(ScrnInfoPtr pScrn); void GetScratchOptions(ScrnInfoPtr pScrn); -void vAST1000DisplayOn(ASTRecPtr pAST); -void vAST1000DisplayOff(ASTRecPtr pAST); +void vAST1000DisplayOn(ScrnInfoPtr pScrn); +void vAST1000DisplayOff(ScrnInfoPtr pScrn); void ASTBlankScreen(ScrnInfoPtr pScrn, Bool unblack); void vSetStartAddressCRT1(ASTRecPtr pAST, ULONG base); void vASTLoadPalette(ScrnInfoPtr pScrn, int numColors, int *indices, LOCO *colors, VisualPtr pVisual); @@ -76,6 +106,3774 @@ Bool GetVGAEDID(ScrnInfoPtr pScrn, unsigned char *pEDIDBuffer); Bool bInitAST1180(ScrnInfoPtr pScrn); void GetAST1180DRAMInfo(ScrnInfoPtr pScrn); +/* + * BMCI2C + */ +#define I2C_BASE 0x1e780000 + +static void SetI2CReg(ScrnInfoPtr pScrn, UCHAR jChannel, UCHAR DeviceAddr, UCHAR jIndex, UCHAR jData ) +{ + ASTRecPtr pAST = ASTPTR(pScrn); + ULONG ulData, ulI2CBase, ulI2CAddr; + UCHAR *ulI2CPortBase; + UCHAR *pjMMIOBase; + ULONG retry; + + { + pjMMIOBase = pAST->MMIOVirtualAddr; + ulI2CBase = I2C_BASE; + ulI2CPortBase = pjMMIOBase + 0x1a000 + 0x40 * jChannel; + ulI2CAddr = DeviceAddr; + } + + *(ULONG *) (pjMMIOBase + 0xF004) = ulI2CBase; + *(ULONG *) (pjMMIOBase + 0xF000) = 0x1; + + *(ULONG *) (ulI2CPortBase + 0x00) = 0x0; + *(ULONG *) (ulI2CPortBase + 0x04) = 0x77743355; + *(ULONG *) (ulI2CPortBase + 0x08) = 0x0; + *(ULONG *) (ulI2CPortBase + 0x10) = 0xffffffff; + *(ULONG *) (ulI2CPortBase + 0x00) = 0x1; + *(ULONG *) (ulI2CPortBase + 0x0C) = 0xAF; + *(ULONG *) (ulI2CPortBase + 0x20) = ulI2CAddr; + *(ULONG *) (ulI2CPortBase + 0x14) = 0x03; + retry = 0; + do { + ulData = *(ULONG *) (ulI2CPortBase + 0x10); + DelayUS(10); + if (retry++ > 1000) + goto Exit_SetI2CReg; + } while (!(ulData & 0x01)); + *(ULONG *) (ulI2CPortBase + 0x10) = 0xffffffff; + *(ULONG *) (ulI2CPortBase + 0x20) = (ULONG) jIndex; + *(ULONG *) (ulI2CPortBase + 0x14) = 0x02; + do { + ulData = *(ULONG *) (ulI2CPortBase + 0x10); + } while (!(ulData & 0x01)); + *(ULONG *) (ulI2CPortBase + 0x10) = 0xffffffff; + *(ULONG *) (ulI2CPortBase + 0x20) = (ULONG) jData; + *(ULONG *) (ulI2CPortBase + 0x14) = 0x02; + do { + ulData = *(ULONG *) (ulI2CPortBase + 0x10); + } while (!(ulData & 0x01)); + *(ULONG *) (ulI2CPortBase + 0x10) = 0xffffffff; + *(ULONG *) (ulI2CPortBase + 0x0C) |= 0x10; + *(ULONG *) (ulI2CPortBase + 0x14) = 0x20; + do { + ulData = *(ULONG *) (ulI2CPortBase + 0x10); + } while (!(ulData & 0x10)); + *(ULONG *) (ulI2CPortBase + 0x0C) &= 0xffffffef; + *(ULONG *) (ulI2CPortBase + 0x10) = 0xffffffff; + DelayUS(10); + +Exit_SetI2CReg: + ; +} + +static UCHAR GetI2CReg(ScrnInfoPtr pScrn, UCHAR jChannel, UCHAR DeviceAddr, UCHAR jIndex) +{ + ASTRecPtr pAST = ASTPTR(pScrn); + UCHAR jData; + ULONG ulData, ulI2CBase, ulI2CAddr; + UCHAR *ulI2CPortBase; + UCHAR *pjMMIOBase; + ULONG retry; + + { + pjMMIOBase = pAST->MMIOVirtualAddr; + ulI2CBase = I2C_BASE; + ulI2CPortBase = pjMMIOBase + 0x1a000 + 0x40 * jChannel; + ulI2CAddr = DeviceAddr; + } + + *(ULONG *) (pjMMIOBase + 0xF004) = ulI2CBase; + *(ULONG *) (pjMMIOBase + 0xF000) = 0x1; + + *(ULONG *) (ulI2CPortBase + 0x00) = 0x0; + *(ULONG *) (ulI2CPortBase + 0x04) = 0x77743355; + *(ULONG *) (ulI2CPortBase + 0x08) = 0x0; + *(ULONG *) (ulI2CPortBase + 0x10) = 0xffffffff; + *(ULONG *) (ulI2CPortBase + 0x00) = 0x1; + *(ULONG *) (ulI2CPortBase + 0x0C) = 0xAF; + *(ULONG *) (ulI2CPortBase + 0x20) = ulI2CAddr; + *(ULONG *) (ulI2CPortBase + 0x14) = 0x03; + retry = 0; + do { + ulData = *(ULONG *) (ulI2CPortBase + 0x10); + DelayUS(10); + if (retry++ > 1000) + return 0; + } while (!(ulData & 0x01)); + *(ULONG *) (ulI2CPortBase + 0x10) = 0xffffffff; + *(ULONG *) (ulI2CPortBase + 0x20) = (ULONG) jIndex; + *(ULONG *) (ulI2CPortBase + 0x14) = 0x02; + do { + ulData = *(ULONG *) (ulI2CPortBase + 0x10); + } while (!(ulData & 0x01)); + *(ULONG *) (ulI2CPortBase + 0x10) = 0xffffffff; + *(ULONG *) (ulI2CPortBase + 0x20) = ulI2CAddr + 1; + *(ULONG *) (ulI2CPortBase + 0x14) = 0x1B; + do { + ulData = *(ULONG *) (ulI2CPortBase + 0x10); + } while (!(ulData & 0x04)); + *(ULONG *) (ulI2CPortBase + 0x10) = 0xffffffff; + *(ULONG *) (ulI2CPortBase + 0x0C) |= 0x10; + *(ULONG *) (ulI2CPortBase + 0x14) = 0x20; + do { + ulData = *(ULONG *) (ulI2CPortBase + 0x10); + } while (!(ulData & 0x10)); + *(ULONG *) (ulI2CPortBase + 0x0C) &= 0xffffffef; + *(ULONG *) (ulI2CPortBase + 0x10) = 0xffffffff; + jData = (UCHAR) ((*(ULONG *) (ulI2CPortBase + 0x20) & 0xFF00) >> 8); + + return (jData); +} + +/* + * DP501 + */ +static UCHAR boot_bin[] = {\ +0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x00,\ +0x00,0x00,0x04,0x56,0x00,0x00,0x04,0x56,\ +0x00,0x00,0x04,0x56,0x00,0x00,0x04,0x56,\ +0x00,0x00,0x04,0x56,0x00,0x00,0x04,0x56,\ +0x00,0x00,0x04,0x56,0x00,0x00,0x04,0x56,\ +0x00,0x00,0x04,0x56,0x00,0x00,0x04,0x56,\ +0x00,0x00,0x04,0x56,0x00,0x00,0x04,0x56,\ +0x00,0x00,0x04,0x56,0x00,0x00,0x04,0x56,\ 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+0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,\ +0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,\ +0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x01,\ +0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x01,\ +0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x01,\ +0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x01,\ +0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x01,\ +0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x01,\ +0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x01,\ +0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,\ +0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x01,\ +0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x01,\ +0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x01,\ +0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x01,\ +0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x01,\ +0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x01,\ +0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x01,\ +0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x01,\ +0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x01,\ +0x00,0x00,0x00,0x01,}; + +static ULONG GetFWBase(ScrnInfoPtr pScrn) +{ + ASTRecPtr pAST = ASTPTR(pScrn); + UCHAR *mmiobase; + + mmiobase = pAST->MMIOVirtualAddr; + return (MIndwm(mmiobase, 0x1e6e2104) & 0x7FFFFFFF); +} + +static void send_ack(ScrnInfoPtr pScrn) +{ + ASTRecPtr pAST = ASTPTR(pScrn); + UCHAR SendACK; + + GetIndexRegMask(CRTC_PORT, 0x9b, 0xFF, SendACK); + SendACK |= 0x80; + SetIndexRegMask(CRTC_PORT, 0x9B, 0x00, SendACK); +} + +static void send_nack(ScrnInfoPtr pScrn) +{ + ASTRecPtr pAST = ASTPTR(pScrn); + UCHAR SendACK; + + GetIndexRegMask(CRTC_PORT, 0x9b, 0xFF, SendACK); + SendACK &= ~0x80; + SetIndexRegMask(CRTC_PORT, 0x9B, 0x00, SendACK); +} + +static Bool wait_ack(ScrnInfoPtr pScrn) +{ + ASTRecPtr pAST = ASTPTR(pScrn); + UCHAR WaitACK; + ULONG retry=0; + + do { + GetIndexRegMask(CRTC_PORT, 0xd2, 0xFF, WaitACK); + WaitACK &= 0x80; + DelayUS(100); + } while ( (!WaitACK) && (retry++ < 1000) ); + + if (retry < 1000) + return TRUE; + else + return FALSE; +} + +static Bool wait_nack(ScrnInfoPtr pScrn) +{ + ASTRecPtr pAST = ASTPTR(pScrn); + UCHAR WaitACK; + ULONG retry=0; + + do { + GetIndexRegMask(CRTC_PORT, 0xd2, 0xFF, WaitACK); + WaitACK &= 0x80; + DelayUS(100); + } while ( (WaitACK) && (retry++ < 1000) ); + + if (retry < 1000) + return TRUE; + else + return FALSE; +} + +static void set_cmd_trigger(ScrnInfoPtr pScrn) +{ + ASTRecPtr pAST = ASTPTR(pScrn); + + SetIndexRegMask(CRTC_PORT, 0x9B, ~0x40, 0x40); +} + +static void clear_cmd_trigger(ScrnInfoPtr pScrn) +{ + ASTRecPtr pAST = ASTPTR(pScrn); + + SetIndexRegMask(CRTC_PORT, 0x9B, ~0x40, 0x00); +} + +static Bool wait_fw_ready(ScrnInfoPtr pScrn) +{ + ASTRecPtr pAST = ASTPTR(pScrn); + ULONG WaitReady; + ULONG retry=0; + + do { + GetIndexRegMask(CRTC_PORT, 0xd2, 0xFF, WaitReady); + WaitReady &= 0x40; + DelayUS(100); + } while ( (!WaitReady) && (retry++ < 1000) ); + + if (retry < 1000) + return TRUE; + else + return FALSE; +} + +static Bool write_cmd(ScrnInfoPtr pScrn, UCHAR data) +{ + ASTRecPtr pAST = ASTPTR(pScrn); + UCHAR retry = 0; + + if (wait_nack(pScrn)) + { + send_nack(pScrn); + SetIndexRegMask(CRTC_PORT, 0x9a, 0x00, data); + send_ack(pScrn); + set_cmd_trigger(pScrn); + do { + if (wait_ack(pScrn)) + { + clear_cmd_trigger(pScrn); + send_nack(pScrn); + return TRUE; + } + } while (retry++ < 100); + } + + clear_cmd_trigger(pScrn); + send_nack(pScrn); + return FALSE; +} + +static Bool write_data(ScrnInfoPtr pScrn, UCHAR data) +{ + ASTRecPtr pAST = ASTPTR(pScrn); + + if (wait_nack(pScrn)) + { + send_nack(pScrn); + SetIndexRegMask(CRTC_PORT, 0x9a, 0x00, data); + send_ack(pScrn); + if (wait_ack(pScrn)) + { + send_nack(pScrn); + return TRUE; + } + } + + send_nack(pScrn); + return FALSE; +} + +static Bool read_data(ScrnInfoPtr pScrn, UCHAR *data) +{ + ASTRecPtr pAST = ASTPTR(pScrn); + UCHAR Temp; + + *(UCHAR *)(data) = 0; + if (wait_ack(pScrn) == FALSE) return FALSE; + GetIndexRegMask(CRTC_PORT, 0xd3, 0xFF, Temp); + *(UCHAR *)(data) = Temp; + send_ack(pScrn); + if (wait_nack(pScrn) == FALSE) + { + send_nack(pScrn); + return FALSE; + } + + send_nack(pScrn); + return TRUE; +} + +static void clear_cmd(ScrnInfoPtr pScrn) +{ + ASTRecPtr pAST = ASTPTR(pScrn); + + send_nack(pScrn); + SetIndexRegMask(CRTC_PORT, 0x9a, 0x00, 0x00); +} + +static void SetDP501VideoOutput(ScrnInfoPtr pScrn, UCHAR Mode) +{ + write_cmd(pScrn, 0x40); + write_data(pScrn, Mode); + + DelayMS(10); /* delay 10ms */ + +} /* SetDP501VideoOutput */ + +static BOOL BackupM68KFW(ScrnInfoPtr pScrn, UCHAR *addr, ULONG size) +{ + ASTRecPtr pAST = ASTPTR(pScrn); + UCHAR *mmiobase = pAST->MMIOVirtualAddr; + ULONG i, Data; + ULONG BootAddress; + + Data = MIndwm(mmiobase, 0x1e6e2100) & 0x01; + if (Data) /* FW had been load */ + { + /* copy image to buffer */ + BootAddress = GetFWBase(pScrn); + for (i=0; i<size; i+=4) + { + *(ULONG *)(addr + i) = MIndwm(mmiobase, BootAddress + i); + } + return TRUE; + } /* UEFI Driver Handling */ + + return FALSE; +} /* BackupM68KFW */ + +static BOOL LaunchM68K(ScrnInfoPtr pScrn) +{ + ASTRecPtr pAST = ASTPTR(pScrn); + UCHAR *mmiobase = pAST->MMIOVirtualAddr; + ULONG i, Data, Len; + ULONG BootAddress; + UCHAR *pFWAddr; + UCHAR jReg; + + Data = MIndwm(mmiobase, 0x1e6e2100) & 0x01; + if (!Data) /* UEFI Driver Handling */ + { + if (pAST->pDP501FWBufferVirtualAddress) + { + pFWAddr = pAST->pDP501FWBufferVirtualAddress; + Len = 32*1024; /* 32K */ + } + else + { + pFWAddr = boot_bin; + Len = sizeof(boot_bin) / sizeof(boot_bin[0]); + } + + /* Get BootAddress */ + MOutdwm(mmiobase, 0x1e6e2000, 0x1688a8a8); /* open passwd */ + Data = MIndwm(mmiobase, 0x1e6e0004); + switch (Data & 0x03) + { + case 0x00: /* 64M */ + BootAddress = 0x44000000; + break; + default: + case 0x01: /* 128MB */ + BootAddress = 0x48000000; + break; + case 0x02: /* 256MB */ + BootAddress = 0x50000000; + break; + case 0x03: /* 512MB */ + BootAddress = 0x60000000; + break; + } + BootAddress -= 0x200000; /* - 2MB */ + + /* copy image to buffer */ + for (i=0; i<Len; i+=4) + { + Data = *(ULONG *)(pFWAddr + i); + MOutdwm(mmiobase, BootAddress + i, Data); + } + + /* Init SCU */ + MOutdwm(mmiobase, 0x1e6e2000, 0x1688a8a8); /* open passwd */ + + /* Launch FW */ + MOutdwm(mmiobase, 0x1e6e2104, 0x80000000 + BootAddress); + MOutdwm(mmiobase, 0x1e6e2100, 1); + + /* Update Scratch */ + Data = MIndwm(mmiobase, 0x1e6e2040) & 0xFFFFF1FF; /* D[11:9] = 100b: UEFI handling */ + Data |= 0x0800; + MOutdwm(mmiobase, 0x1e6e2040, Data); + + GetIndexRegMask(CRTC_PORT, 0x99, 0xFC, jReg); /* D[1:0]: Reserved Video Buffer */ + jReg |= 0x02; /* 2MB */ + SetIndexReg(CRTC_PORT, 0x99, jReg); + + } /* UEFI Driver Handling */ + + return TRUE; +} /* LaunchM68K */ + +/* + * DP501 external + */ +Bool ReadEDID_M68K(ScrnInfoPtr pScrn, BYTE *pEDIDData) +{ + ASTRecPtr pAST = ASTPTR(pScrn); + UCHAR *mmiobase; + ULONG i, BootAddress, Offset, Data; + + /* init value */ + mmiobase = pAST->MMIOVirtualAddr; + BootAddress = GetFWBase(pScrn); + + /* validate FW version */ + Offset = 0xF000; + Data = MIndwm(mmiobase, BootAddress + Offset); + if ((Data & 0xF0) != 0x10) /* version: 1x */ + return FALSE; + + /* validate PnP Monitor */ + Offset = 0xF010; + Data = MIndwm(mmiobase, BootAddress + Offset); + if (!(Data & 0x01)) + return FALSE; + + /* Read EDID */ + Offset = 0xF020; + for (i=0; i<128; i+=4) + { + Data = MIndwm(mmiobase, BootAddress + Offset + i); + *(ULONG *)(pEDIDData + i) = Data; + } + + return TRUE; +} /* ReadEDID_M68K */ + +UCHAR GetLinkMaxCLK(ScrnInfoPtr pScrn) +{ + ASTRecPtr pAST = ASTPTR(pScrn); + UCHAR *mmiobase; + ULONG BootAddress, Offset, Data; + UCHAR LinkCap[4], LinkRate, LinkLanes, MaxClk = 0xFF; + + /* init value */ + mmiobase = pAST->MMIOVirtualAddr; + BootAddress = GetFWBase(pScrn); + + /* validate FW version */ + Offset = 0xF000; + Data = MIndwm(mmiobase, BootAddress + Offset); + if ((Data & 0xF0) != 0x10) /* version: 1x */ + return MaxClk; + + /* Read Link Capability */ + Offset = 0xF014; + *(ULONG *)(LinkCap) = MIndwm(mmiobase, BootAddress + Offset); + if (LinkCap[2] == 0) /* no Max. CLK Assigned */ + { + LinkRate = LinkCap[0]; + LinkLanes = LinkCap[1]; + Data = (LinkRate == 0x0A) ? (90 * LinkLanes): (54 * LinkLanes); + if (Data > 255) Data = 255; /* Max. */ + MaxClk = (UCHAR)(Data); + } + + return MaxClk; + +} /* GetLinkMaxCLK */ + +/* + * VGA Modules + */ void vASTOpenKey(ScrnInfoPtr pScrn) { @@ -199,26 +3997,46 @@ ULONG GetVRAMInfo(ScrnInfoPtr pScrn) { ASTRecPtr pAST = ASTPTR(pScrn); + ULONG ulVRAMSize; UCHAR jReg; vASTOpenKey(pScrn); + /* Get VRAMSize from H/W Trapping */ GetIndexRegMask(CRTC_PORT, 0xAA, 0xFF, jReg); - switch (jReg & 0x03) { + default: case 0x00: - return (VIDEOMEM_SIZE_08M); + ulVRAMSize = VIDEOMEM_SIZE_08M; + break; case 0x01: - return (VIDEOMEM_SIZE_16M); + ulVRAMSize = VIDEOMEM_SIZE_16M; + break; case 0x02: - return (VIDEOMEM_SIZE_32M); + ulVRAMSize = VIDEOMEM_SIZE_32M; + break; case 0x03: - return (VIDEOMEM_SIZE_64M); + ulVRAMSize = VIDEOMEM_SIZE_64M; + break; } - return (DEFAULT_VIDEOMEM_SIZE); + /* Adjust VRAMSize from Scratch */ + GetIndexRegMask(CRTC_PORT, 0x99, 0xFF, jReg); + switch (jReg & 0x03) + { + case 0x01: + ulVRAMSize -= 0x100000; + break; + case 0x02: + ulVRAMSize -= 0x200000; + break; + case 0x03: + ulVRAMSize -= 0x400000; + break; + } + return (ulVRAMSize); } ULONG @@ -258,6 +4076,12 @@ GetMaxDCLK(ScrnInfoPtr pScrn) ulDCLK = ActualDRAMBandwidth / ((pScrn->bitsPerPixel+1) / 8); } + /* Validate for DP501 */ + if (pAST->jTxChipType == Tx_DP501) + { + if (ulDCLK > pAST->DP501_MaxVCLK) ulDCLK = pAST->DP501_MaxVCLK; + } + /* Add for AST2100, ycchen@061807 */ if ((pAST->jChipType == AST2100) || (pAST->jChipType == AST2200) || (pAST->jChipType == AST2300) || (pAST->jChipType == AST2400) || (pAST->jChipType == AST1180) ) { @@ -316,6 +4140,38 @@ GetScratchOptions(ScrnInfoPtr pScrn) if (jReg & 0x10) pAST->VGA2Clone = TRUE; + /* 3rd Tx Check */ + pAST->pDP501FWBufferVirtualAddress = NULL; + pAST->jTxChipType = Tx_NONE; + /* Get 3rd Tx Info from HW Reg. */ + GetIndexRegMask(CRTC_PORT, 0xA3, 0xFF, jReg); + if (jReg & 0x80) + pAST->jTxChipType = Tx_Sil164; + /* Get 3rd Tx Info from BMC Scratch */ + if ((pAST->jChipType == AST2300) || (pAST->jChipType == AST2400)) + { + GetIndexRegMask(CRTC_PORT, 0xD1, 0x0E, jReg); + switch (jReg) + { + case 0x04: + pAST->jTxChipType = Tx_Sil164; + break; + case 0x08: + pAST->pDP501FWBufferVirtualAddress = (UCHAR*) calloc(1, 32*1024); + if (pAST->pDP501FWBufferVirtualAddress) + { + if (BackupM68KFW(pScrn, pAST->pDP501FWBufferVirtualAddress, 32*1024) == FALSE) + { + free(pAST->pDP501FWBufferVirtualAddress); + pAST->pDP501FWBufferVirtualAddress = NULL; + } + } /* Backup DP501 FW */ + case 0x0c: + pAST->jTxChipType = Tx_DP501; + break; + } + } + /* WideScreen Support */ switch (pAST->jChipType) { @@ -369,10 +4225,15 @@ vSetStartAddressCRT1(ASTRecPtr pAST, ULONG base) } void -vAST1000DisplayOff(ASTRecPtr pAST) +vAST1000DisplayOff(ScrnInfoPtr pScrn) { + ASTRecPtr pAST = ASTPTR(pScrn); ULONG ulData; + /* 3rd Tx */ + if (pAST->jTxChipType == Tx_DP501) + SetDP501VideoOutput(pScrn, 0); + if (pAST->jChipType == AST1180) { ReadAST1180SOC(AST1180_GFX_BASE + AST1180_VGA1_CTRL, ulData); @@ -381,13 +4242,15 @@ vAST1000DisplayOff(ASTRecPtr pAST) } else SetIndexRegMask(SEQ_PORT,0x01, 0xDF, 0x20); -} +} void -vAST1000DisplayOn(ASTRecPtr pAST) +vAST1000DisplayOn(ScrnInfoPtr pScrn) { - ULONG ulData; + + ASTRecPtr pAST = ASTPTR(pScrn); + ULONG ulData; if (pAST->jChipType == AST1180) { @@ -397,18 +4260,18 @@ vAST1000DisplayOn(ASTRecPtr pAST) } else SetIndexRegMask(SEQ_PORT,0x01, 0xDF, 0x00); + + /* 3rd Tx */ + if (pAST->jTxChipType == Tx_DP501) + SetDP501VideoOutput(pScrn, 1); } void ASTBlankScreen(ScrnInfoPtr pScrn, Bool unblack) { - ASTRecPtr pAST; - - pAST = ASTPTR(pScrn); - if (unblack) - vAST1000DisplayOn(pAST); + vAST1000DisplayOn(pScrn); else - vAST1000DisplayOff(pAST); + vAST1000DisplayOff(pScrn); } void @@ -516,6 +4379,11 @@ ASTDisplayPowerManagementSet(ScrnInfoPtr pScrn, int PowerManagementMode, int fla break; } + if (PowerManagementMode != DPMSModeOn) + { /* 3rd Tx */ + if (pAST->jTxChipType == Tx_DP501) SetDP501VideoOutput(pScrn, 0); + } + if (pAST->jChipType == AST1180) { ReadAST1180SOC(AST1180_GFX_BASE + AST1180_VGA1_CTRL, ulTemp); @@ -529,12 +4397,18 @@ ASTDisplayPowerManagementSet(ScrnInfoPtr pScrn, int PowerManagementMode, int fla SetIndexRegMask(CRTC_PORT,0xB6, 0xFC, CRB6); } + if (PowerManagementMode == DPMSModeOn) + { /* 3rd Tx */ + if (pAST->jTxChipType == Tx_DP501) SetDP501VideoOutput(pScrn, 1); + } } -#define I2C_BASE 0x1e780000 -#define I2C_OFFSET (0xA000 + 0x40 * 4) /* port4 */ -#define I2C_DEVICEADDR 0x0A0 /* slave addr */ +#ifndef I2C_BASE +#define I2C_BASE 0x1e780000 +#endif +#define I2C_OFFSET (0xA000 + 0x40 * 4) /* port4 */ +#define I2C_DEVICEADDR 0x0A0 /* slave addr */ #define I2C_BASE_AST1180 0x80fc0000 #define I2C_OFFSET_AS1180 (0xB000 + 0x40 * 2) /* port2 */ @@ -755,35 +4629,6 @@ void vSetDefExtReg(ScrnInfoPtr pScrn) } -__inline ULONG MIndwm(UCHAR *mmiobase, ULONG r) -{ - ULONG ulData; - - *(ULONG *) (mmiobase + 0xF004) = r & 0xFFFF0000; - *(ULONG *) (mmiobase + 0xF000) = 0x1; - - do { - ulData = *(volatile ULONG *) (mmiobase + 0xF004) & 0xFFFF0000; - } while (ulData != (r & 0xFFFF0000) ); - - return ( *(volatile ULONG *) (mmiobase + 0x10000 + (r & 0x0000FFFF)) ); - -} - -__inline void MOutdwm(UCHAR *mmiobase, ULONG r, ULONG v) -{ - ULONG ulData; - - *(ULONG *) (mmiobase + 0xF004) = r & 0xFFFF0000; - *(ULONG *) (mmiobase + 0xF000) = 0x1; - - do { - ulData = *(volatile ULONG *) (mmiobase + 0xF004) & 0xFFFF0000; - } while (ulData != (r & 0xFFFF0000) ); - - *(volatile ULONG *) (mmiobase + 0x10000 + (r & 0x0000FFFF)) = v; -} - /* * AST2100/2150 DLL CBR Setting */ @@ -2578,6 +6423,109 @@ void vGetDefaultSettings(ScrnInfoPtr pScrn) } /* vGetDefaultSettings */ +Bool InitDVO(ScrnInfoPtr pScrn) +{ + ASTRecPtr pAST = ASTPTR(pScrn); + ULONG ulData; + UCHAR jReg; + + *(ULONG *) (pAST->MMIOVirtualAddr + 0xF004) = 0x1e6e0000; + *(ULONG *) (pAST->MMIOVirtualAddr + 0xF000) = 0x1; + *(ULONG *) (pAST->MMIOVirtualAddr + 0x12000) = 0x1688A8A8; + + GetIndexRegMask(CRTC_PORT, 0xD0, 0xFF, jReg); + if (!(jReg & 0x80)) /* Init SCU DVO Settings */ + { + ulData = *(ULONG *) (pAST->MMIOVirtualAddr + 0x12008); /* delay phase */ + ulData &= 0xfffff8ff; + ulData |= 0x00000500; + *(ULONG *) (pAST->MMIOVirtualAddr + 0x12008) = ulData; + + if (pAST->jChipType == AST2300) + { + ulData = *(ULONG *) (pAST->MMIOVirtualAddr + 0x12084); /* multi-pins for DVO single-edge */ + ulData |= 0xfffe0000; + *(ULONG *) (pAST->MMIOVirtualAddr + 0x12084) = ulData; + + ulData = *(ULONG *) (pAST->MMIOVirtualAddr + 0x12088); /* multi-pins for DVO single-edge */ + ulData |= 0x000fffff; + *(ULONG *) (pAST->MMIOVirtualAddr + 0x12088) = ulData; + + ulData = *(ULONG *) (pAST->MMIOVirtualAddr + 0x12090); /* multi-pins for DVO single-edge */ + ulData &= 0xffffffcf; + ulData |= 0x00000020; + *(ULONG *) (pAST->MMIOVirtualAddr + 0x12090) = ulData; + } + else /* AST2400 */ + { + ulData = *(ULONG *) (pAST->MMIOVirtualAddr + 0x12088); /* multi-pins for DVO single-edge */ + ulData |= 0x30000000; + *(ULONG *) (pAST->MMIOVirtualAddr + 0x12088) = ulData; + + ulData = *(ULONG *) (pAST->MMIOVirtualAddr + 0x1208c); /* multi-pins for DVO single-edge */ + ulData |= 0x000000cf; + *(ULONG *) (pAST->MMIOVirtualAddr + 0x1208c) = ulData; + + ulData = *(ULONG *) (pAST->MMIOVirtualAddr + 0x120a4); /* multi-pins for DVO single-edge */ + ulData |= 0xffff0000; + *(ULONG *) (pAST->MMIOVirtualAddr + 0x120a4) = ulData; + + ulData = *(ULONG *) (pAST->MMIOVirtualAddr + 0x120a8); /* multi-pins for DVO single-edge */ + ulData |= 0x0000000f; + *(ULONG *) (pAST->MMIOVirtualAddr + 0x120a8) = ulData; + + ulData = *(ULONG *) (pAST->MMIOVirtualAddr + 0x12094); /* multi-pins for DVO single-edge */ + ulData |= 0x00000002; + *(ULONG *) (pAST->MMIOVirtualAddr + 0x12094) = ulData; + } + } + + /* Force to DVO */ + ulData = *(ULONG *) (pAST->MMIOVirtualAddr + 0x1202c); + ulData &= 0xfffbffff; + *(ULONG *) (pAST->MMIOVirtualAddr + 0x1202c) = ulData; + + /* Init VGA DVO Settings */ + SetIndexRegMask(CRTC_PORT, 0xA3, 0xCF, 0x80); /* enable DVO, single-edge */ + + return TRUE; +} /* InitDVO */ + +void vInit3rdTX(ScrnInfoPtr pScrn) +{ + ASTRecPtr pAST = ASTPTR(pScrn); + ULONG ulData; + UCHAR jReg; + + /* Only support on AST2300/2400 */ + if ((pAST->jChipType == AST2300) || (pAST->jChipType == AST2400)) + { + GetIndexRegMask(CRTC_PORT, 0xD1, 0xFF, jReg); /* D[1]: DVO Enable */ + switch (jReg & 0x0E) /* D[11:9] */ + { + case 0x04: /* Sil164 */ + InitDVO(pScrn); + break; + case 0x08: /* DP501 with VBIOS launch FW */ + LaunchM68K(pScrn); + case 0x0C: /* DP501 with BMC launch FW */ + InitDVO(pScrn); + break; + default: /* Force to VGA */ + if (pAST->jTxChipType == Tx_Sil164) + InitDVO(pScrn); + else + { + *(ULONG *)(pAST->MMIOVirtualAddr + 0x12000) = 0x1688A8A8; + ulData = *(ULONG *) (pAST->MMIOVirtualAddr + 0x1202c); + ulData &= 0xfffcffff; + *(ULONG *)(pAST->MMIOVirtualAddr) = ulData; + } + } + } + +} /* vInit3rdTX */ + /* * Flags: 0: POST init * 1: resume from power management @@ -2609,6 +6557,7 @@ Bool InitVGA(ScrnInfoPtr pScrn, ULONG Flags) else vInitDRAMReg(pScrn); + vInit3rdTX(pScrn); } return (TRUE); diff --git a/src/ast_vgatool.h b/src/ast_vgatool.h index 275369b..6d24263 100644 --- a/src/ast_vgatool.h +++ b/src/ast_vgatool.h @@ -166,3 +166,7 @@ *(ULONG *) (pAST->MMIOVirtualAddr + 0xF000) = 0x1; \ *(ULONG *) (pAST->MMIOVirtualAddr + 0x10000 + ((addr) & 0x0000FFFF)) = (data); \ } + +/* Delay */ +#define DelayUS(x) usleep(x) +#define DelayMS(x) DelayUS(1000*x) |