From 7a455573ff292819be90e086fbc1198d05a04910 Mon Sep 17 00:00:00 2001
From: Dave Airlie <airlied@redhat.com>
Date: Tue, 3 Apr 2012 10:01:53 +0100
Subject: Revert "xf86-video-ast-ast 0.95.00"

This reverts commit 6f0b593c273979bc4a83e845e037ab35d4565b72.
---
 src/ast_vgatool.h | 64 ++++++++++++++++++++++++++-----------------------------
 1 file changed, 30 insertions(+), 34 deletions(-)
 mode change 100755 => 100644 src/ast_vgatool.h

(limited to 'src/ast_vgatool.h')

diff --git a/src/ast_vgatool.h b/src/ast_vgatool.h
old mode 100755
new mode 100644
index 275369b..53cb4c7
--- a/src/ast_vgatool.h
+++ b/src/ast_vgatool.h
@@ -40,38 +40,36 @@
 #define DRAMTYPE_2Gx16		6
 #define DRAMTYPE_4Gx16		7
 
-#define AR_PORT_WRITE		(pAST->MMIOVirtualAddr + 0x3c0)
-#define MISC_PORT_WRITE		(pAST->MMIOVirtualAddr + 0x3c2)
-#define VGA_ENABLE_PORT		(pAST->MMIOVirtualAddr + 0x3c3)
-#define SEQ_PORT		(pAST->MMIOVirtualAddr + 0x3c4)
+#define AR_PORT_WRITE		(pAST->RelocateIO + 0x40)
+#define MISC_PORT_WRITE		(pAST->RelocateIO + 0x42)
+#define SEQ_PORT 		(pAST->RelocateIO + 0x44)
 #define DAC_INDEX_READ		(pAST->MMIOVirtualAddr + 0x3c7)
-#define DAC_INDEX_WRITE		(pAST->MMIOVirtualAddr + 0x3c8)
-#define DAC_DATA		(pAST->MMIOVirtualAddr + 0x3c9)
-#define GR_PORT			(pAST->MMIOVirtualAddr + 0x3cE)
-#define CRTC_PORT		(pAST->MMIOVirtualAddr + 0x3d4)
-#define INPUT_STATUS1_READ	(pAST->MMIOVirtualAddr + 0x3dA)
-#define MISC_PORT_READ		(pAST->MMIOVirtualAddr + 0x3cc)
-
-#define GetReg(base)				MMIO_IN8(base, 0)
-#define SetReg(base,val)			MMIO_OUT8(base, 0, val)
-#define GetIndexReg(base,index,val)		{ \
-						MMIO_OUT8(base, 0, index);	\
-						val = MMIO_IN8(base, 1);	\
-						}
-#define SetIndexReg(base,index, val)		{ \
-						MMIO_OUT8(base, 0, index);	\
-						MMIO_OUT8(base, 1, val);	\
-						}
-#define GetIndexRegMask(base,index, and, val)	{ \
-						MMIO_OUT8(base, 0, index);	\
-						val = MMIO_IN8(base, 1) & and;	\
-						}
-#define SetIndexRegMask(base,index, and, val)	{ \
-						UCHAR __Temp;	\
-						MMIO_OUT8(base, 0, index);	\
-						__Temp = (MMIO_IN8(base, 1)&(and))|(val);	\
-						SetIndexReg(base,index,__Temp);			\
-						}
+#define DAC_INDEX_WRITE		(pAST->RelocateIO + 0x48)
+#define DAC_DATA		(pAST->RelocateIO + 0x49)
+#define GR_PORT			(pAST->RelocateIO + 0x4E)
+#define CRTC_PORT 		(pAST->RelocateIO + 0x54)
+#define INPUT_STATUS1_READ	(pAST->RelocateIO + 0x5A)
+#define MISC_PORT_READ		(pAST->RelocateIO + 0x4C)
+
+#define GetReg(base)				inb(base)
+#define SetReg(base,val)			outb(base,val)
+#define GetIndexReg(base,index,val)			do {			\
+                      				outb(base,index);	\
+                      				val = inb(base+1);		\
+                    				} while (0)
+#define SetIndexReg(base,index, val)		do { \
+						outw(base, ((USHORT)(val) << 8) | index);	\
+						} while (0)
+#define GetIndexRegMask(base,index, and, val)	do {			\
+                      				outb(base,index);	\
+                      				val = (inb(base+1) & and);		\
+                    				} while (0)                    			
+#define SetIndexRegMask(base,index, and, val)  	do { \
+                      				UCHAR __Temp; 	\
+                      				outb(base,index);   	\
+                      				__Temp = (inb((base)+1)&(and))|(val); 	\
+                      				SetIndexReg(base,index,__Temp); 	\
+                    				} while (0)
 
 #define VGA_GET_PALETTE_INDEX(index, red, green, blue) \
 { \
@@ -84,7 +82,6 @@
    __junk = GetReg(SEQ_PORT);			\
    blue = GetReg(DAC_DATA);		\
    __junk = GetReg(SEQ_PORT);			\
-   (void)__junk;				\
 }
 
 #define VGA_LOAD_PALETTE_INDEX(index, red, green, blue) \
@@ -97,8 +94,7 @@
    SetReg(DAC_DATA,(UCHAR)(green));		\
    __junk = GetReg(SEQ_PORT);			\
    SetReg(DAC_DATA,(UCHAR)(blue));		\
-   __junk = GetReg(SEQ_PORT);			\
-   (void)__junk;				\
+   __junk = GetReg(SEQ_PORT);      		\
 }
 
 /* Reg. Definition */
-- 
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