diff options
| author | Alex Deucher <alex@botch2.(none)> | 2007-10-15 20:06:28 -0400 |
|---|---|---|
| committer | Alex Deucher <alex@botch2.(none)> | 2007-10-15 20:06:28 -0400 |
| commit | 2f87bff293a343b40c1be096933a5ae126632468 (patch) | |
| tree | ebc68fe45a4d5b0143368fb77e0031ab82ff847b | |
| parent | fd5bb7bb5e968127b87102320eccc1222f205e5a (diff) | |
RADEON: Fix subtle change in crtc reg init
At some point we changed how hsync_wid and vsync_wid were clipped.
Previously we used the field size as a mask when building the
register. This got changed to setting the value to the field
size if it was greater. this probably explains number stange
mode bugs.
| -rw-r--r-- | src/radeon_crtc.c | 12 |
1 files changed, 4 insertions, 8 deletions
diff --git a/src/radeon_crtc.c b/src/radeon_crtc.c index 46377632..eeb1c6c8 100644 --- a/src/radeon_crtc.c +++ b/src/radeon_crtc.c @@ -348,11 +348,10 @@ RADEONInitCrtcRegisters(xf86CrtcPtr crtc, RADEONSavePtr save, hsync_wid = (mode->CrtcHSyncEnd - mode->CrtcHSyncStart) / 8; if (!hsync_wid) hsync_wid = 1; - if (hsync_wid > 0x3f) hsync_wid = 0x3f; hsync_start = mode->CrtcHSyncStart - 8; save->crtc_h_sync_strt_wid = ((hsync_start & 0x1fff) - | (hsync_wid << 16) + | ((hsync_wid & 0x3f) << 16) | ((mode->Flags & V_NHSYNC) ? RADEON_CRTC_H_SYNC_POL : 0)); @@ -363,10 +362,9 @@ RADEONInitCrtcRegisters(xf86CrtcPtr crtc, RADEONSavePtr save, vsync_wid = mode->CrtcVSyncEnd - mode->CrtcVSyncStart; if (!vsync_wid) vsync_wid = 1; - if (vsync_wid > 0x1f) vsync_wid = 0x1f; save->crtc_v_sync_strt_wid = (((mode->CrtcVSyncStart - 1) & 0xfff) - | (vsync_wid << 16) + | ((vsync_wid & 0x1f) << 16) | ((mode->Flags & V_NVSYNC) ? RADEON_CRTC_V_SYNC_POL : 0)); @@ -545,11 +543,10 @@ RADEONInitCrtc2Registers(xf86CrtcPtr crtc, RADEONSavePtr save, hsync_wid = (mode->CrtcHSyncEnd - mode->CrtcHSyncStart) / 8; if (!hsync_wid) hsync_wid = 1; - if (hsync_wid > 0x3f) hsync_wid = 0x3f; hsync_start = mode->CrtcHSyncStart - 8; save->crtc2_h_sync_strt_wid = ((hsync_start & 0x1fff) - | (hsync_wid << 16) + | ((hsync_wid & 0x3f) << 16) | ((mode->Flags & V_NHSYNC) ? RADEON_CRTC_H_SYNC_POL : 0)); @@ -560,10 +557,9 @@ RADEONInitCrtc2Registers(xf86CrtcPtr crtc, RADEONSavePtr save, vsync_wid = mode->CrtcVSyncEnd - mode->CrtcVSyncStart; if (!vsync_wid) vsync_wid = 1; - if (vsync_wid > 0x1f) vsync_wid = 0x1f; save->crtc2_v_sync_strt_wid = (((mode->CrtcVSyncStart - 1) & 0xfff) - | (vsync_wid << 16) + | ((vsync_wid & 0x1f) << 16) | ((mode->Flags & V_NVSYNC) ? RADEON_CRTC2_V_SYNC_POL : 0)); |