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authorMichel Dänzer <michel@tungstengraphics.com>2006-06-21 09:38:47 +0200
committerMichel Dänzer <michel@tungstengraphics.com>2006-06-21 09:38:47 +0200
commita01c01787cfbe3706ae7747cde1657abd79ecdaa (patch)
tree5d1d8d5a7c6ec97c18ad0bba4a11514ca6222bab
parent79d1c573133e64ddf4446b6bb0eaab4a5a6c73ab (diff)
Bug #7283: Build fixes for !defined(XF86DRI).
Thanks to Matthieu Herrb for pointing out some of these.
-rw-r--r--src/radeon.h14
-rw-r--r--src/radeon_driver.c45
-rw-r--r--src/radeon_exa.c9
-rw-r--r--src/radeon_video.c3
4 files changed, 41 insertions, 30 deletions
diff --git a/src/radeon.h b/src/radeon.h
index 8e773130..7368308e 100644
--- a/src/radeon.h
+++ b/src/radeon.h
@@ -789,6 +789,13 @@ extern void R300CGWorkaround(ScrnInfoPtr pScrn);
extern void RADEONPllErrataAfterIndex(RADEONInfoPtr info);
extern void RADEONPllErrataAfterData(RADEONInfoPtr info);
+extern Bool RADEONGetBIOSInfo(ScrnInfoPtr pScrn, xf86Int10InfoPtr pInt10);
+extern Bool RADEONGetConnectorInfoFromBIOS (ScrnInfoPtr pScrn);
+extern Bool RADEONGetClockInfoFromBIOS (ScrnInfoPtr pScrn);
+extern Bool RADEONGetLVDSInfoFromBIOS (ScrnInfoPtr pScrn);
+extern Bool RADEONGetTMDSInfoFromBIOS (ScrnInfoPtr pScrn);
+extern Bool RADEONGetHardCodedEDIDFromBIOS (ScrnInfoPtr pScrn);
+
#ifdef XF86DRI
#ifdef USE_XAA
extern void RADEONAccelInitCP(ScreenPtr pScreen, XAAInfoRecPtr a);
@@ -823,13 +830,6 @@ extern void RADEONHostDataBlitCopyPass(ScrnInfoPtr pScrn,
extern void RADEONCopySwap(CARD8 *dst, CARD8 *src, unsigned int size,
int swap);
-extern Bool RADEONGetBIOSInfo(ScrnInfoPtr pScrn, xf86Int10InfoPtr pInt10);
-extern Bool RADEONGetConnectorInfoFromBIOS (ScrnInfoPtr pScrn);
-extern Bool RADEONGetClockInfoFromBIOS (ScrnInfoPtr pScrn);
-extern Bool RADEONGetLVDSInfoFromBIOS (ScrnInfoPtr pScrn);
-extern Bool RADEONGetTMDSInfoFromBIOS (ScrnInfoPtr pScrn);
-extern Bool RADEONGetHardCodedEDIDFromBIOS (ScrnInfoPtr pScrn);
-
#define RADEONCP_START(pScrn, info) \
do { \
int _ret = drmCommandNone(info->drmFD, DRM_RADEON_CP_START); \
diff --git a/src/radeon_driver.c b/src/radeon_driver.c
index 5a20ac6a..23818311 100644
--- a/src/radeon_driver.c
+++ b/src/radeon_driver.c
@@ -135,7 +135,10 @@ static int RADEONValidateMergeModes(ScrnInfoPtr pScrn);
static void RADEONSetDynamicClock(ScrnInfoPtr pScrn, int mode);
static void RADEONUpdatePanelSize(ScrnInfoPtr pScrn);
static void RADEONSaveMemMapRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save);
+
+#ifdef XF86DRI
static void RADEONAdjustMemMapRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save);
+#endif
/* psuedo xinerama support */
@@ -6337,6 +6340,7 @@ static void RADEONRestoreMemMapRegisters(ScrnInfoPtr pScrn,
RADEONTRACE(("Memory map updated.\n"));
}
+#ifdef XF86DRI
static void RADEONAdjustMemMapRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save)
{
RADEONInfoPtr info = RADEONPTR(pScrn);
@@ -6392,6 +6396,7 @@ static void RADEONAdjustMemMapRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save)
}
}
}
+#endif
/* Write common registers */
static void RADEONRestoreCommonRegisters(ScrnInfoPtr pScrn,
@@ -6874,15 +6879,11 @@ void RADEONChangeSurfaces(ScrnInfoPtr pScrn)
RADEONInfoPtr info = RADEONPTR(pScrn);
int cpp = info->CurrentLayout.pixel_bytes;
- int depthCpp = (info->depthBits - 8) / 4;
/* depth/front/back pitch must be identical (and the same as displayWidth) */
int width_bytes = pScrn->displayWidth * cpp;
int bufferSize = ((((pScrn->virtualY + 15) & ~15) * width_bytes
+ RADEON_BUFFER_ALIGN) & ~RADEON_BUFFER_ALIGN);
- int depth_width_bytes = pScrn->displayWidth * depthCpp;
- int depthBufferSize = ((((pScrn->virtualY + 15) & ~15) * depth_width_bytes
- + RADEON_BUFFER_ALIGN) & ~RADEON_BUFFER_ALIGN);
- unsigned int depth_pattern, color_pattern, swap_pattern;
+ unsigned int color_pattern, swap_pattern;
if (!info->allowColorTiling)
return;
@@ -6901,28 +6902,21 @@ void RADEONChangeSurfaces(ScrnInfoPtr pScrn)
#endif
if (info->ChipFamily < CHIP_FAMILY_R200) {
color_pattern = RADEON_SURF_TILE_COLOR_MACRO;
- if (depthCpp == 2)
- depth_pattern = RADEON_SURF_TILE_DEPTH_16BPP;
- else
- depth_pattern = RADEON_SURF_TILE_DEPTH_32BPP;
} else if (IS_R300_VARIANT) {
color_pattern = R300_SURF_TILE_COLOR_MACRO;
- if (depthCpp == 2)
- depth_pattern = R300_SURF_TILE_COLOR_MACRO;
- else
- depth_pattern = R300_SURF_TILE_COLOR_MACRO | R300_SURF_TILE_DEPTH_32BPP;
} else {
color_pattern = R200_SURF_TILE_COLOR_MACRO;
- if (depthCpp == 2)
- depth_pattern = R200_SURF_TILE_DEPTH_16BPP;
- else
- depth_pattern = R200_SURF_TILE_DEPTH_32BPP;
}
#ifdef XF86DRI
if (info->directRenderingInited) {
drmRadeonSurfaceFree drmsurffree;
drmRadeonSurfaceAlloc drmsurfalloc;
int retvalue;
+ int depthCpp = (info->depthBits - 8) / 4;
+ int depth_width_bytes = pScrn->displayWidth * depthCpp;
+ int depthBufferSize = ((((pScrn->virtualY + 15) & ~15) * depth_width_bytes
+ + RADEON_BUFFER_ALIGN) & ~RADEON_BUFFER_ALIGN);
+ unsigned int depth_pattern;
drmsurffree.address = info->frontOffset;
retvalue = drmCommandWrite(info->drmFD, DRM_RADEON_SURF_FREE,
@@ -6967,6 +6961,23 @@ void RADEONChangeSurfaces(ScrnInfoPtr pScrn)
"drm: could not allocate surface for back buffer!\n");
}
+ if (info->ChipFamily < CHIP_FAMILY_R200) {
+ if (depthCpp == 2)
+ depth_pattern = RADEON_SURF_TILE_DEPTH_16BPP;
+ else
+ depth_pattern = RADEON_SURF_TILE_DEPTH_32BPP;
+ } else if (IS_R300_VARIANT) {
+ if (depthCpp == 2)
+ depth_pattern = R300_SURF_TILE_COLOR_MACRO;
+ else
+ depth_pattern = R300_SURF_TILE_COLOR_MACRO | R300_SURF_TILE_DEPTH_32BPP;
+ } else {
+ if (depthCpp == 2)
+ depth_pattern = R200_SURF_TILE_DEPTH_16BPP;
+ else
+ depth_pattern = R200_SURF_TILE_DEPTH_32BPP;
+ }
+
/* rv100 and probably the derivative igps don't have depth tiling on all the time? */
if (info->have3DWindows && ((info->ChipFamily != CHIP_FAMILY_RV100) ||
(info->ChipFamily != CHIP_FAMILY_RS100) ||
diff --git a/src/radeon_exa.c b/src/radeon_exa.c
index 0cf86f54..5bbce877 100644
--- a/src/radeon_exa.c
+++ b/src/radeon_exa.c
@@ -197,7 +197,7 @@ static Bool RADEONPrepareAccess(PixmapPtr pPix, int index)
RINFO_FROM_SCREEN(pPix->drawable.pScreen);
unsigned char *RADEONMMIO = info->MMIO;
CARD32 offset = exaGetPixmapOffset(pPix);
- int bpp, rc, soff;
+ int bpp, soff;
CARD32 size, flags;
/* Front buffer is always set with proper swappers */
@@ -231,6 +231,7 @@ static Bool RADEONPrepareAccess(PixmapPtr pPix, int index)
#if defined(XF86DRI)
if (info->directRenderingEnabled && info->allowColorTiling) {
drmRadeonSurfaceAlloc drmsurfalloc;
+ int rc;
drmsurfalloc.address = offset;
drmsurfalloc.size = size;
@@ -367,9 +368,7 @@ Bool RADEONSetupMemEXA (ScreenPtr pScreen)
ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
RADEONInfoPtr info = RADEONPTR(pScrn);
int cpp = info->CurrentLayout.pixel_bytes;
- int depthCpp = (info->depthBits - 8) / 4;
- int l;
- int next, screen_size;
+ int screen_size;
int byteStride = pScrn->displayWidth * cpp;
if (info->exa != NULL) {
@@ -401,7 +400,7 @@ Bool RADEONSetupMemEXA (ScreenPtr pScreen)
#if defined(XF86DRI)
if (info->directRenderingEnabled) {
- int depth_size;
+ int depthCpp = (info->depthBits - 8) / 4, l, next, depth_size;
info->frontOffset = 0;
info->frontPitch = pScrn->displayWidth;
diff --git a/src/radeon_video.c b/src/radeon_video.c
index e9e503f9..c59298a4 100644
--- a/src/radeon_video.c
+++ b/src/radeon_video.c
@@ -2109,6 +2109,7 @@ RADEONCopyData(
}
}
+#ifdef XF86DRI
static void RADEON_420_422(
unsigned int *d,
unsigned char *s1,
@@ -2123,7 +2124,7 @@ static void RADEON_420_422(
n--;
}
}
-
+#endif
static void
RADEONCopyRGB24Data(