Stability fixes from radeon-gem-cs

2 files changed, 21 insertions, 23 deletions

diff --git a/src/radeon_exa_render.c b/src/radeon_exa_render.c
index e5cc196f..68a7a768 100644
--- a/src/radeon_exa_render.c
+++ b/src/radeon_exa_render.c
@@ -559,6 +559,8 @@ static Bool FUNC_NAME(R100PrepareComposite)(int op,
     if (!RADEONSetupSourceTile(pSrcPicture, pSrc, FALSE, TRUE))
 	return FALSE;
 
+    RADEON_SWITCH_TO_3D();
+
     if (!FUNC_NAME(R100TextureSetup)(pSrcPicture, pSrc, 0))
 	return FALSE;
     pp_cntl = RADEON_TEX_0_ENABLE | RADEON_TEX_BLEND_0_ENABLE;
@@ -571,8 +573,6 @@ static Bool FUNC_NAME(R100PrepareComposite)(int op,
 	info->accel_state->is_transform[1] = FALSE;
     }
 
-    RADEON_SWITCH_TO_3D();
-
     BEGIN_ACCEL(8);
     OUT_ACCEL_REG(RADEON_PP_CNTL, pp_cntl);
     OUT_ACCEL_REG(RADEON_RB3D_CNTL, dst_format | RADEON_ALPHA_BLEND_ENABLE);
@@ -860,6 +860,8 @@ static Bool FUNC_NAME(R200PrepareComposite)(int op, PicturePtr pSrcPicture,
     if (!RADEONSetupSourceTile(pSrcPicture, pSrc, FALSE, TRUE))
 	return FALSE;
 
+    RADEON_SWITCH_TO_3D();
+
     if (!FUNC_NAME(R200TextureSetup)(pSrcPicture, pSrc, 0))
 	return FALSE;
     pp_cntl = RADEON_TEX_0_ENABLE | RADEON_TEX_BLEND_0_ENABLE;
@@ -872,8 +874,6 @@ static Bool FUNC_NAME(R200PrepareComposite)(int op, PicturePtr pSrcPicture,
 	info->accel_state->is_transform[1] = FALSE;
     }
 
-    RADEON_SWITCH_TO_3D();
-
     BEGIN_ACCEL(11);
 
     OUT_ACCEL_REG(RADEON_PP_CNTL, pp_cntl);
@@ -1224,6 +1224,8 @@ static Bool FUNC_NAME(R300PrepareComposite)(int op, PicturePtr pSrcPicture,
     if (!RADEONSetupSourceTile(pSrcPicture, pSrc, TRUE, FALSE))
 	return FALSE;
 
+    RADEON_SWITCH_TO_3D();
+
     if (!FUNC_NAME(R300TextureSetup)(pSrcPicture, pSrc, 0))
 	return FALSE;
     txenable = R300_TEX_0_ENABLE;
@@ -1236,8 +1238,6 @@ static Bool FUNC_NAME(R300PrepareComposite)(int op, PicturePtr pSrcPicture,
 	info->accel_state->is_transform[1] = FALSE;
     }
 
-    RADEON_SWITCH_TO_3D();
-
     /* setup the VAP */
     if (info->accel_state->has_tcl) {
 	if (pMask)
@@ -1845,11 +1845,16 @@ static Bool FUNC_NAME(R300PrepareComposite)(int op, PicturePtr pSrcPicture,
 
     FINISH_ACCEL();
 
+    BEGIN_ACCEL(1);
+    if (info->accel_state->has_mask)
+	OUT_ACCEL_REG(R300_VAP_VTX_SIZE, 6);
+    else
+	OUT_ACCEL_REG(R300_VAP_VTX_SIZE, 4);
+    FINISH_ACCEL();
+
     return TRUE;
 }
 
-#define VTX_COUNT_MASK 6
-#define VTX_COUNT 4
 
 #ifdef ACCEL_CP
 
@@ -1955,15 +1960,9 @@ static void FUNC_NAME(RadeonCompositeTile)(PixmapPtr pDst,
     }
 
     if (info->accel_state->has_mask)
-	vtx_count = VTX_COUNT_MASK;
+	vtx_count = 6;
     else
-	vtx_count = VTX_COUNT;
-
-    if (IS_R300_3D || IS_R500_3D) {
-	BEGIN_ACCEL(1);
-	OUT_ACCEL_REG(R300_VAP_VTX_SIZE, vtx_count);
-	FINISH_ACCEL();
-    }
+	vtx_count = 4;
 
 #ifdef ACCEL_CP
     if (info->ChipFamily < CHIP_FAMILY_R200) {
@@ -2127,7 +2126,8 @@ static void FUNC_NAME(RadeonDoneComposite)(PixmapPtr pDst)
     ENTER_DRAW(0);
 
     if (IS_R300_3D || IS_R500_3D) {
-	BEGIN_ACCEL(2);
+	BEGIN_ACCEL(3);
+	OUT_ACCEL_REG(R300_SC_CLIP_RULE, 0xAAAA);
 	OUT_ACCEL_REG(R300_RB3D_DSTCACHE_CTLSTAT, R300_RB3D_DC_FLUSH_ALL);
     } else
 	BEGIN_ACCEL(1);
diff --git a/src/radeon_textured_videofuncs.c b/src/radeon_textured_videofuncs.c
index c5ad0e18..8a4a31d7 100644
--- a/src/radeon_textured_videofuncs.c
+++ b/src/radeon_textured_videofuncs.c
@@ -45,9 +45,6 @@
 #endif
 #endif
 
-#define VTX_DWORD_COUNT_FILTER 6
-#define VTX_DWORD_COUNT 4
-
 #ifdef ACCEL_CP
 
 #define VTX_OUT_FILTER(_dstX, _dstY, _srcX, _srcY, _maskX, _maskY)	\
@@ -145,9 +142,9 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
     FINISH_ACCEL();
 
     if (pPriv->bicubic_enabled)
-	vtx_count = VTX_DWORD_COUNT_FILTER;
+	vtx_count = 6;
     else
-	vtx_count = VTX_DWORD_COUNT;
+	vtx_count = 4;
 
     if (IS_R300_3D || IS_R500_3D) {
 	uint32_t output_fmt;
@@ -1237,7 +1234,8 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
     }
 
     if (IS_R300_3D || IS_R500_3D) {
-	BEGIN_ACCEL(2);
+	BEGIN_ACCEL(3);
+	OUT_ACCEL_REG(R300_SC_CLIP_RULE, 0xAAAA);
 	OUT_ACCEL_REG(R300_RB3D_DSTCACHE_CTLSTAT, R300_RB3D_DC_FLUSH_ALL);
     } else
 	BEGIN_ACCEL(1);