Add support for SYNC extension fences v2

v2: Swapped order of patches 11 & 12 because the Present extension uses
    SYNC fences.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

5 files changed, 165 insertions, 2 deletions

diff --git a/configure.ac b/configure.ac
index 891da03b..c2e5a206 100644
--- a/configure.ac
+++ b/configure.ac
@@ -131,6 +131,12 @@ AC_CHECK_DECL(xorg_list_init,
 	      #include "xorg-server.h"
 	      #include "list.h"])
 
+AC_CHECK_HEADERS([misyncshm.h], [], [],
+                 [#include <X11/Xdefs.h>
+	          #include <X11/Xfuncproto.h>
+	          #include "screenint.h"
+	          #include "xorg-server.h"])
+
 CPPFLAGS="$SAVE_CPPFLAGS"
 
 PKG_CHECK_MODULES([PCIACCESS], [pciaccess >= 0.8.0])
diff --git a/src/Makefile.am b/src/Makefile.am
index 9cc8a2df..acb83f12 100644
--- a/src/Makefile.am
+++ b/src/Makefile.am
@@ -29,8 +29,8 @@
 ati_drv_la_LIBADD = $(PCIACCESS_LIBS)
 radeon_drv_la_LIBADD = $(LIBDRM_RADEON_LIBS) $(PCIACCESS_LIBS)
 
-RADEON_KMS_SRCS=radeon_dri2.c radeon_drm_queue.c radeon_kms.c drmmode_display.c \
-	radeon_vbo.c radeon_bo_helper.c
+RADEON_KMS_SRCS=radeon_dri2.c radeon_drm_queue.c radeon_kms.c radeon_sync.c \
+	radeon_vbo.c radeon_bo_helper.c drmmode_display.c
 
 RADEON_EXA_SOURCES = radeon_exa.c r600_exa.c r6xx_accel.c r600_textured_videofuncs.c r600_shader.c radeon_exa_shared.c \
 	evergreen_exa.c evergreen_accel.c evergreen_shader.c evergreen_textured_videofuncs.c cayman_accel.c cayman_shader.c
diff --git a/src/radeon.h b/src/radeon.h
index e503cbb3..cc52bd96 100644
--- a/src/radeon.h
+++ b/src/radeon.h
@@ -90,6 +90,8 @@
 #include "simple_list.h"
 #include "atipcirename.h"
 
+typedef struct _SyncFence SyncFence;
+
 #ifndef MAX
 #define MAX(a,b) ((a)>(b)?(a):(b))
 #endif
@@ -445,6 +447,9 @@ typedef struct {
 
     void              (*BlockHandler)(BLOCKHANDLER_ARGS_DECL);
 
+    void              (*CreateFence) (ScreenPtr pScreen, SyncFence *pFence,
+				      Bool initially_triggered);
+
     int               pix24bpp;         /* Depth of pixmap for 24bpp fb      */
     Bool              dac6bits;         /* Use 6 bit DAC?                    */
 
@@ -544,6 +549,10 @@ extern Bool RADEONGetDatatypeBpp(int bpp, uint32_t *type);
 extern Bool RADEONGetPixmapOffsetPitch(PixmapPtr pPix,
 				       uint32_t *pitch_offset);
 
+/* radeon_sync.c */
+extern Bool radeon_sync_init(ScreenPtr screen);
+extern void radeon_sync_close(ScreenPtr screen);
+
 /* radeon_video.c */
 extern void RADEONInitVideo(ScreenPtr pScreen);
 extern void RADEONResetVideo(ScrnInfoPtr pScrn);
diff --git a/src/radeon_kms.c b/src/radeon_kms.c
index d25d7f53..521f3b95 100644
--- a/src/radeon_kms.c
+++ b/src/radeon_kms.c
@@ -1192,6 +1192,8 @@ static Bool RADEONCloseScreen_KMS(CLOSE_SCREEN_ARGS_DECL)
 	info->accel_state->exa = NULL;
     }
 
+    radeon_sync_close(pScreen);
+
     if (info->accel_state->use_vbos)
         radeon_vbo_free_lists(pScrn);
 
@@ -1338,6 +1340,8 @@ Bool RADEONScreenInit_KMS(SCREEN_INIT_ARGS_DECL)
     }
 #endif
 
+    radeon_sync_init(pScreen);
+
     pScrn->vtSema = TRUE;
     xf86SetBackingStore(pScreen);
 
diff --git a/src/radeon_sync.c b/src/radeon_sync.c
new file mode 100644
index 00000000..d8ab5bce
--- /dev/null
+++ b/src/radeon_sync.c
@@ -0,0 +1,144 @@
+/*
+ * Copyright © 2013-2014 Intel Corporation
+ * Copyright © 2015 Advanced Micro Devices, Inc.
+ *
+ * Permission to use, copy, modify, distribute, and sell this software and its
+ * documentation for any purpose is hereby granted without fee, provided that
+ * the above copyright notice appear in all copies and that both that copyright
+ * notice and this permission notice appear in supporting documentation, and
+ * that the name of the copyright holders not be used in advertising or
+ * publicity pertaining to distribution of the software without specific,
+ * written prior permission.  The copyright holders make no representations
+ * about the suitability of this software for any purpose.  It is provided "as
+ * is" without express or implied warranty.
+ *
+ * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+ * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+ * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+ * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
+ * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
+ * OF THIS SOFTWARE.
+ */
+
+#include "radeon.h"
+
+#ifdef HAVE_MISYNCSHM_H
+
+#include "misyncshm.h"
+#include "misyncstr.h"
+
+/*
+ * This whole file exists to wrap a sync fence trigger operation
+ * so that we can flush the batch buffer to provide serialization
+ * between the server and the shm fence client
+ */
+
+static DevPrivateKeyRec radeon_sync_fence_private_key;
+
+typedef struct _radeon_sync_fence_private {
+        SyncFenceSetTriggeredFunc set_triggered;
+} radeon_sync_fence_private;
+
+#define SYNC_FENCE_PRIV(pFence)                                         \
+        (radeon_sync_fence_private *) dixLookupPrivate(&pFence->devPrivates, &radeon_sync_fence_private_key)
+
+static void
+radeon_sync_fence_set_triggered (SyncFence *fence)
+{
+	ScreenPtr screen = fence->pScreen;
+	radeon_sync_fence_private *private = SYNC_FENCE_PRIV(fence);
+
+	/* Flush pending rendering operations */
+	radeon_cs_flush_indirect(xf86ScreenToScrn(screen));
+
+	fence->funcs.SetTriggered = private->set_triggered;
+	fence->funcs.SetTriggered(fence);
+	private->set_triggered = fence->funcs.SetTriggered;
+	fence->funcs.SetTriggered = radeon_sync_fence_set_triggered;
+}
+
+static void
+radeon_sync_create_fence(ScreenPtr screen,
+                        SyncFence *fence,
+                        Bool initially_triggered)
+{
+	ScrnInfoPtr scrn = xf86ScreenToScrn(screen);
+	RADEONInfoPtr info = RADEONPTR(scrn);
+	SyncScreenFuncsPtr screen_funcs = miSyncGetScreenFuncs(screen);
+	radeon_sync_fence_private *private = SYNC_FENCE_PRIV(fence);
+
+	screen_funcs->CreateFence = info->CreateFence;
+	screen_funcs->CreateFence(screen, fence, initially_triggered);
+	info->CreateFence = screen_funcs->CreateFence;
+	screen_funcs->CreateFence = radeon_sync_create_fence;
+
+	private->set_triggered = fence->funcs.SetTriggered;
+	fence->funcs.SetTriggered = radeon_sync_fence_set_triggered;
+}
+
+Bool
+radeon_sync_init(ScreenPtr screen)
+{
+	ScrnInfoPtr scrn = xf86ScreenToScrn(screen);
+	RADEONInfoPtr info = RADEONPTR(scrn);
+	SyncScreenFuncsPtr screen_funcs;
+
+	if (!miSyncShmScreenInit(screen)) {
+		xf86DrvMsg(scrn->scrnIndex, X_WARNING,
+			   "SYNC extension fences disabled because "
+			   "miSyncShmScreenInit failed\n");
+		return FALSE;
+	}
+
+	if (!dixPrivateKeyRegistered(&radeon_sync_fence_private_key)) {
+		if (!dixRegisterPrivateKey(&radeon_sync_fence_private_key,
+					   PRIVATE_SYNC_FENCE,
+					   sizeof (radeon_sync_fence_private))) {
+			xf86DrvMsg(scrn->scrnIndex, X_WARNING,
+				   "SYNC extension fences disabled because "
+				   "dixRegisterPrivateKey failed\n");
+			return FALSE;
+		}
+	}
+
+	xf86DrvMsg(xf86ScreenToScrn(screen)->scrnIndex, X_INFO,
+		   "SYNC extension fences enabled\n");
+
+	screen_funcs = miSyncGetScreenFuncs(screen);
+	info->CreateFence = screen_funcs->CreateFence;
+	screen_funcs->CreateFence = radeon_sync_create_fence;
+	return TRUE;
+}
+
+void
+radeon_sync_close(ScreenPtr screen)
+{
+	ScrnInfoPtr scrn = xf86ScreenToScrn(screen);
+	RADEONInfoPtr info = RADEONPTR(scrn);
+	SyncScreenFuncsPtr screen_funcs = miSyncGetScreenFuncs(screen);
+
+	if (screen_funcs && info->CreateFence)
+		screen_funcs->CreateFence = info->CreateFence;
+
+	info->CreateFence = NULL;
+}
+
+#else /* !HAVE_MISYNCSHM_H */
+
+Bool
+radeon_sync_init(ScreenPtr screen)
+{
+	xf86DrvMsg(xf86ScreenToScrn(screen)->scrnIndex, X_INFO,
+		   "SYNC extension fences disabled because misyncshm.h not "
+		   "available at build time\n");
+
+	return FALSE;
+}
+
+void
+radeon_sync_close(ScreenPtr screen)
+{
+}
+
+#endif