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authorAlex Deucher <alex@botch2.com>2008-04-10 14:24:04 -0400
committerAlex Deucher <alex@botch2.com>2008-04-10 14:24:04 -0400
commit9e2ffe66d106abe34a670d2edc9905ed62c485e8 (patch)
tree90458a9d89be84781a7d0452613ef791a516f809
parente1a9f26c2d2cbca9ad159e723ec95b95be1ef349 (diff)
R3xx+: use the right register for engine flush
-rw-r--r--src/radeon_accel.c37
-rw-r--r--src/radeon_reg.h1
2 files changed, 27 insertions, 11 deletions
diff --git a/src/radeon_accel.c b/src/radeon_accel.c
index 67dae7cb..7865de1b 100644
--- a/src/radeon_accel.c
+++ b/src/radeon_accel.c
@@ -158,17 +158,32 @@ void RADEONEngineFlush(ScrnInfoPtr pScrn)
unsigned char *RADEONMMIO = info->MMIO;
int i;
- OUTREGP(RADEON_RB3D_DSTCACHE_CTLSTAT,
- RADEON_RB3D_DC_FLUSH_ALL,
- ~RADEON_RB3D_DC_FLUSH_ALL);
- for (i = 0; i < RADEON_TIMEOUT; i++) {
- if (!(INREG(RADEON_RB3D_DSTCACHE_CTLSTAT) & RADEON_RB3D_DC_BUSY))
- break;
- }
- if (i == RADEON_TIMEOUT) {
- xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG,
- "DC flush timeout: %x\n",
- (unsigned int)INREG(RADEON_RB3D_DSTCACHE_CTLSTAT));
+ if (info->ChipFamily <= CHIP_FAMILY_RV280) {
+ OUTREGP(RADEON_RB3D_DSTCACHE_CTLSTAT,
+ RADEON_RB3D_DC_FLUSH_ALL,
+ ~RADEON_RB3D_DC_FLUSH_ALL);
+ for (i = 0; i < RADEON_TIMEOUT; i++) {
+ if (!(INREG(RADEON_RB3D_DSTCACHE_CTLSTAT) & RADEON_RB3D_DC_BUSY))
+ break;
+ }
+ if (i == RADEON_TIMEOUT) {
+ xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG,
+ "DC flush timeout: %x\n",
+ (unsigned int)INREG(RADEON_RB3D_DSTCACHE_CTLSTAT));
+ }
+ } else {
+ OUTREGP(R300_RB2D_DSTCACHE_CTLSTAT,
+ R300_RB2D_DC_FLUSH_ALL,
+ ~R300_RB2D_DC_FLUSH_ALL);
+ for (i = 0; i < RADEON_TIMEOUT; i++) {
+ if (!(INREG(R300_RB2D_DSTCACHE_CTLSTAT) & R300_RB2D_DC_BUSY))
+ break;
+ }
+ if (i == RADEON_TIMEOUT) {
+ xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG,
+ "DC flush timeout: %x\n",
+ (unsigned int)INREG(R300_RB2D_DSTCACHE_CTLSTAT));
+ }
}
}
diff --git a/src/radeon_reg.h b/src/radeon_reg.h
index 6ace3429..aaac052c 100644
--- a/src/radeon_reg.h
+++ b/src/radeon_reg.h
@@ -4614,6 +4614,7 @@
# define R300_DC_FLUSH_2D (1 << 0)
# define R300_DC_FREE_2D (1 << 2)
# define R300_RB2D_DC_FLUSH_ALL (R300_DC_FLUSH_2D | R300_DC_FREE_2D)
+# define R300_RB2D_DC_BUSY (1 << 31)
#define R300_RB3D_DSTCACHE_CTLSTAT 0x4e4c
# define R300_DC_FLUSH_3D (2 << 0)
# define R300_DC_FREE_3D (2 << 2)