diff options
| author | Pierre Ossman <pierre@ossman.eu> | 2008-12-03 19:16:03 +0100 |
|---|---|---|
| committer | Pierre Ossman <pierre@ossman.eu> | 2008-12-03 19:16:03 +0100 |
| commit | e04bcb0066781f61e97787856261e3380036d304 (patch) | |
| tree | 1a90a6cce985358a0ccf5f40347ee252ad36020e | |
| parent | fa496d7b0397d9be57db90d0860928e9ced73cca (diff) | |
Fix node setup on R300 bicubic pixel shader. It was backwards and used
the wrong base for sizes.
| -rw-r--r-- | src/radeon_textured_videofuncs.c | 19 |
1 files changed, 10 insertions, 9 deletions
diff --git a/src/radeon_textured_videofuncs.c b/src/radeon_textured_videofuncs.c index 61cca6a2..4d34f8f6 100644 --- a/src/radeon_textured_videofuncs.c +++ b/src/radeon_textured_videofuncs.c @@ -366,20 +366,21 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv R300_TEX_CODE_OFFSET(0) | R300_TEX_CODE_SIZE(6))); - OUT_ACCEL_REG(R300_US_CODE_ADDR_3, (R300_ALU_START(0) | - R300_ALU_SIZE(1) | + /* Nodes are allocated highest first, but executed lowest first */ + OUT_ACCEL_REG(R300_US_CODE_ADDR_0, 0); + OUT_ACCEL_REG(R300_US_CODE_ADDR_1, (R300_ALU_START(0) | + R300_ALU_SIZE(0) | R300_TEX_START(0) | - R300_TEX_SIZE(1))); + R300_TEX_SIZE(0))); OUT_ACCEL_REG(R300_US_CODE_ADDR_2, (R300_ALU_START(1) | - R300_ALU_SIZE(10) | + R300_ALU_SIZE(9) | R300_TEX_START(1) | - R300_TEX_SIZE(1))); - OUT_ACCEL_REG(R300_US_CODE_ADDR_1, (R300_ALU_START(11) | - R300_ALU_SIZE(3) | + R300_TEX_SIZE(0))); + OUT_ACCEL_REG(R300_US_CODE_ADDR_3, (R300_ALU_START(11) | + R300_ALU_SIZE(2) | R300_TEX_START(2) | - R300_TEX_SIZE(4) | + R300_TEX_SIZE(3) | R300_RGBA_OUT)); - OUT_ACCEL_REG(R300_US_CODE_ADDR_0, 0); /* ** BICUBIC FP ** */ |