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authorAlex Deucher <alexdeucher@gmail.com>2008-07-10 21:24:16 -0400
committerAlex Deucher <alexdeucher@gmail.com>2008-08-25 09:33:53 -0400
commit71ad140fa11f3a504c38d6bddf40e3a3c0a20e60 (patch)
treef88db340888dd16fef8345daea033181e12e371a
parent5b2e095c31b88d8495a4f86e6cb46b49fa4acd65 (diff)
Move accel state to a separate struct
Diffstat
-rw-r--r--src/radeon.h161
-rw-r--r--src/radeon_accel.c54
-rw-r--r--src/radeon_accelfuncs.c346
-rw-r--r--src/radeon_commonfuncs.c17
-rw-r--r--src/radeon_dga.c46
-rw-r--r--src/radeon_dri.c51
-rw-r--r--src/radeon_driver.c73
-rw-r--r--src/radeon_exa.c54
-rw-r--r--src/radeon_exa_funcs.c94
-rw-r--r--src/radeon_exa_render.c52
-rw-r--r--src/radeon_render.c65
-rw-r--r--src/radeon_textured_videofuncs.c34
12 files changed, 536 insertions, 511 deletions
diff --git a/src/radeon.h b/src/radeon.h
index 626b492f..e2ba3606 100644
--- a/src/radeon.h
+++ b/src/radeon.h
@@ -435,6 +435,87 @@ struct radeon_cp {
};
#endif
+struct radeon_accel_state {
+ /* common accel data */
+ int fifo_slots; /* Free slots in the FIFO (64 max) */
+ /* Computed values for Radeon */
+ int pitch;
+ int datatype;
+ uint32_t dp_gui_master_cntl;
+ uint32_t dp_gui_master_cntl_clip;
+ uint32_t trans_color;
+ /* Saved values for ScreenToScreenCopy */
+ int xdir;
+ int ydir;
+ uint32_t dst_pitch_offset;
+
+ /* render accel */
+ unsigned short texW[2];
+ unsigned short texH[2];
+ Bool XInited3D; /* X itself has the 3D context */
+ int num_gb_pipes;
+ Bool has_tcl;
+
+#ifdef USE_EXA
+ /* EXA */
+ ExaDriverPtr exa;
+ int exaSyncMarker;
+ int exaMarkerSynced;
+ int engineMode;
+#define EXA_ENGINEMODE_UNKNOWN 0
+#define EXA_ENGINEMODE_2D 1
+#define EXA_ENGINEMODE_3D 2
+#endif
+
+#ifdef USE_XAA
+ /* XAA */
+ XAAInfoRecPtr accel;
+ /* ScanlineScreenToScreenColorExpand support */
+ unsigned char *scratch_buffer[1];
+ unsigned char *scratch_save;
+ int scanline_x;
+ int scanline_y;
+ int scanline_w;
+ int scanline_h;
+ int scanline_h_w;
+ int scanline_words;
+ int scanline_direct;
+ int scanline_bpp; /* Only used for ImageWrite */
+ int scanline_fg;
+ int scanline_bg;
+ int scanline_hpass;
+ int scanline_x1clip;
+ int scanline_x2clip;
+ /* Saved values for DashedTwoPointLine */
+ int dashLen;
+ uint32_t dashPattern;
+ int dash_fg;
+ int dash_bg;
+
+ FBLinearPtr RenderTex;
+ void (*RenderCallback)(ScrnInfoPtr);
+ Time RenderTimeout;
+ /*
+ * XAAForceTransBlit is used to change the behavior of the XAA
+ * SetupForScreenToScreenCopy function, to make it DGA-friendly.
+ */
+ Bool XAAForceTransBlit;
+#endif
+#ifdef XF86DRI
+ /* Saved scissor values */
+ uint32_t sc_left;
+ uint32_t sc_right;
+ uint32_t sc_top;
+ uint32_t sc_bottom;
+
+ uint32_t re_top_left;
+ uint32_t re_width_height;
+
+ uint32_t aux_sc_cntl;
+#endif
+
+};
+
typedef struct {
EntityInfoPtr pEnt;
pciVideoPtr PciInfo;
@@ -501,21 +582,13 @@ typedef struct {
Bool PaletteSavedOnVT; /* Palette saved on last VT switch */
+ struct radeon_accel_state *accel_state;
+
#ifdef USE_EXA
- ExaDriverPtr exa;
- int exaSyncMarker;
- int exaMarkerSynced;
- int engineMode;
-#define EXA_ENGINEMODE_UNKNOWN 0
-#define EXA_ENGINEMODE_2D 1
-#define EXA_ENGINEMODE_3D 2
#ifdef XF86DRI
Bool accelDFS;
#endif
#endif
-#ifdef USE_XAA
- XAAInfoRecPtr accel;
-#endif
Bool accelOn;
xf86CursorInfoPtr cursor;
Bool allowColorTiling;
@@ -526,53 +599,9 @@ typedef struct {
int cursor_fg;
int cursor_bg;
-#ifdef USE_XAA
- /*
- * XAAForceTransBlit is used to change the behavior of the XAA
- * SetupForScreenToScreenCopy function, to make it DGA-friendly.
- */
- Bool XAAForceTransBlit;
-#endif
-
- int fifo_slots; /* Free slots in the FIFO (64 max) */
int pix24bpp; /* Depth of pixmap for 24bpp fb */
Bool dac6bits; /* Use 6 bit DAC? */
- /* Computed values for Radeon */
- int pitch;
- int datatype;
- uint32_t dp_gui_master_cntl;
- uint32_t dp_gui_master_cntl_clip;
- uint32_t trans_color;
-
- /* Saved values for ScreenToScreenCopy */
- int xdir;
- int ydir;
-
-#ifdef USE_XAA
- /* ScanlineScreenToScreenColorExpand support */
- unsigned char *scratch_buffer[1];
- unsigned char *scratch_save;
- int scanline_x;
- int scanline_y;
- int scanline_w;
- int scanline_h;
- int scanline_h_w;
- int scanline_words;
- int scanline_direct;
- int scanline_bpp; /* Only used for ImageWrite */
- int scanline_fg;
- int scanline_bg;
- int scanline_hpass;
- int scanline_x1clip;
- int scanline_x2clip;
-#endif
- /* Saved values for DashedTwoPointLine */
- int dashLen;
- uint32_t dashPattern;
- int dash_fg;
- int dash_bg;
-
DGAModePtr DGAModes;
int numDGAModes;
Bool DGAactive;
@@ -580,7 +609,7 @@ typedef struct {
DGAFunctionRec DGAFuncs;
RADEONFBLayout CurrentLayout;
- uint32_t dst_pitch_offset;
+
#ifdef XF86DRI
Bool noBackBuffer;
Bool directRenderingEnabled;
@@ -728,13 +757,6 @@ typedef struct {
/* Render */
Bool RenderAccel;
- unsigned short texW[2];
- unsigned short texH[2];
-#ifdef USE_XAA
- FBLinearPtr RenderTex;
- void (*RenderCallback)(ScrnInfoPtr);
- Time RenderTimeout;
-#endif
/* general */
Bool showCache;
@@ -748,9 +770,6 @@ typedef struct {
XF86ModReqInfo xaaReq;
#endif
- /* X itself has the 3D context */
- Bool XInited3D;
-
DisplayModePtr currentMode, savedCurrentMode;
/* special handlings for DELL triple-head server */
@@ -805,15 +824,13 @@ typedef struct {
Bool r600_shadow_fb;
void *fb_shadow;
- int num_gb_pipes;
- Bool has_tcl;
} RADEONInfoRec, *RADEONInfoPtr;
#define RADEONWaitForFifo(pScrn, entries) \
do { \
- if (info->fifo_slots < entries) \
+ if (info->accel_state->fifo_slots < entries) \
RADEONWaitForFifoFunction(pScrn, entries); \
- info->fifo_slots -= entries; \
+ info->accel_state->fifo_slots -= entries; \
} while (0)
/* legacy_crtc.c */
@@ -1258,7 +1275,7 @@ static __inline__ void RADEON_MARK_SYNC(RADEONInfoPtr info, ScrnInfoPtr pScrn)
#endif
#ifdef USE_XAA
if (!info->useEXA)
- SET_SYNC_FLAG(info->accel);
+ SET_SYNC_FLAG(info->accel_state->accel);
#endif
}
@@ -1269,8 +1286,8 @@ static __inline__ void RADEON_SYNC(RADEONInfoPtr info, ScrnInfoPtr pScrn)
exaWaitSync(pScrn->pScreen);
#endif
#ifdef USE_XAA
- if (!info->useEXA && info->accel)
- info->accel->Sync(pScrn);
+ if (!info->useEXA && info->accel_state->accel)
+ info->accel_state->accel->Sync(pScrn);
#endif
}
diff --git a/src/radeon_accel.c b/src/radeon_accel.c
index 72866d19..6c19b708 100644
--- a/src/radeon_accel.c
+++ b/src/radeon_accel.c
@@ -130,9 +130,9 @@ void RADEONWaitForFifoFunction(ScrnInfoPtr pScrn, int entries)
for (;;) {
for (i = 0; i < RADEON_TIMEOUT; i++) {
- info->fifo_slots =
+ info->accel_state->fifo_slots =
INREG(RADEON_RBBM_STATUS) & RADEON_RBBM_FIFOCNT_MASK;
- if (info->fifo_slots >= entries) return;
+ if (info->accel_state->fifo_slots >= entries) return;
}
xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG,
"FIFO timed out: %u entries, stat=0x%08x\n",
@@ -324,8 +324,8 @@ void RADEONEngineRestore(ScrnInfoPtr pScrn)
* in the wrong place (happened).
*/
RADEONWaitForFifo(pScrn, 2);
- OUTREG(RADEON_DST_PITCH_OFFSET, info->dst_pitch_offset);
- OUTREG(RADEON_SRC_PITCH_OFFSET, info->dst_pitch_offset);
+ OUTREG(RADEON_DST_PITCH_OFFSET, info->accel_state->dst_pitch_offset);
+ OUTREG(RADEON_SRC_PITCH_OFFSET, info->accel_state->dst_pitch_offset);
RADEONWaitForFifo(pScrn, 1);
#if X_BYTE_ORDER == X_BIG_ENDIAN
@@ -343,7 +343,7 @@ void RADEONEngineRestore(ScrnInfoPtr pScrn)
OUTREG(RADEON_DEFAULT_SC_BOTTOM_RIGHT, (RADEON_DEFAULT_SC_RIGHT_MAX
| RADEON_DEFAULT_SC_BOTTOM_MAX));
RADEONWaitForFifo(pScrn, 1);
- OUTREG(RADEON_DP_GUI_MASTER_CNTL, (info->dp_gui_master_cntl
+ OUTREG(RADEON_DP_GUI_MASTER_CNTL, (info->accel_state->dp_gui_master_cntl
| RADEON_GMC_BRUSH_SOLID_COLOR
| RADEON_GMC_SRC_DATATYPE_COLOR));
@@ -356,7 +356,7 @@ void RADEONEngineRestore(ScrnInfoPtr pScrn)
RADEONWaitForIdleMMIO(pScrn);
- info->XInited3D = FALSE;
+ info->accel_state->XInited3D = FALSE;
}
/* Initialize the acceleration hardware */
@@ -384,9 +384,9 @@ void RADEONEngineInit(ScrnInfoPtr pScrn)
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
"Failed to determine num pipes from DRM, falling back to "
"manual look-up!\n");
- info->num_gb_pipes = 0;
+ info->accel_state->num_gb_pipes = 0;
} else {
- info->num_gb_pipes = num_pipes;
+ info->accel_state->num_gb_pipes = num_pipes;
}
}
#endif
@@ -399,34 +399,34 @@ void RADEONEngineInit(ScrnInfoPtr pScrn)
(info->ChipFamily == CHIP_FAMILY_RS400) ||
(info->ChipFamily == CHIP_FAMILY_RS480) ||
IS_R500_3D) {
- if (info->num_gb_pipes == 0) {
+ if (info->accel_state->num_gb_pipes == 0) {
uint32_t gb_pipe_sel = INREG(R400_GB_PIPE_SELECT);
- info->num_gb_pipes = ((gb_pipe_sel >> 12) & 0x3) + 1;
+ info->accel_state->num_gb_pipes = ((gb_pipe_sel >> 12) & 0x3) + 1;
if (IS_R500_3D)
OUTPLL(pScrn, R500_DYN_SCLK_PWMEM_PIPE, (1 | ((gb_pipe_sel >> 8) & 0xf) << 4));
}
} else {
- if (info->num_gb_pipes == 0) {
+ if (info->accel_state->num_gb_pipes == 0) {
if ((info->ChipFamily == CHIP_FAMILY_R300) ||
(info->ChipFamily == CHIP_FAMILY_R350)) {
/* R3xx chips */
- info->num_gb_pipes = 2;
+ info->accel_state->num_gb_pipes = 2;
} else {
/* RV3xx chips */
- info->num_gb_pipes = 1;
+ info->accel_state->num_gb_pipes = 1;
}
}
}
if (IS_R300_3D || IS_R500_3D)
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "num pipes is %d\n", info->num_gb_pipes);
+ "num quad-pipes is %d\n", info->accel_state->num_gb_pipes);
if (IS_R300_3D || IS_R500_3D) {
uint32_t gb_tile_config = (R300_ENABLE_TILING | R300_TILE_SIZE_16 | R300_SUBPIXEL_1_16);
- switch(info->num_gb_pipes) {
+ switch(info->accel_state->num_gb_pipes) {
case 2: gb_tile_config |= R300_PIPE_COUNT_R300; break;
case 3: gb_tile_config |= R300_PIPE_COUNT_R420_3P; break;
case 4: gb_tile_config |= R300_PIPE_COUNT_R420; break;
@@ -446,11 +446,11 @@ void RADEONEngineInit(ScrnInfoPtr pScrn)
RADEONEngineReset(pScrn);
switch (info->CurrentLayout.pixel_code) {
- case 8: info->datatype = 2; break;
- case 15: info->datatype = 3; break;
- case 16: info->datatype = 4; break;
- case 24: info->datatype = 5; break;
- case 32: info->datatype = 6; break;
+ case 8: info->accel_state->datatype = 2; break;
+ case 15: info->accel_state->datatype = 3; break;
+ case 16: info->accel_state->datatype = 4; break;
+ case 24: info->accel_state->datatype = 5; break;
+ case 32: info->accel_state->datatype = 6; break;
default:
xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG,
"Unknown depth/bpp = %d/%d (code = %d)\n",
@@ -458,14 +458,14 @@ void RADEONEngineInit(ScrnInfoPtr pScrn)
info->CurrentLayout.bitsPerPixel,
info->CurrentLayout.pixel_code);
}
- info->pitch = ((info->CurrentLayout.displayWidth / 8) *
- (info->CurrentLayout.pixel_bytes == 3 ? 3 : 1));
+ info->accel_state->pitch = ((info->CurrentLayout.displayWidth / 8) *
+ (info->CurrentLayout.pixel_bytes == 3 ? 3 : 1));
xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG,
- "Pitch for acceleration = %d\n", info->pitch);
+ "Pitch for acceleration = %d\n", info->accel_state->pitch);
- info->dp_gui_master_cntl =
- ((info->datatype << RADEON_GMC_DST_DATATYPE_SHIFT)
+ info->accel_state->dp_gui_master_cntl =
+ ((info->accel_state->datatype << RADEON_GMC_DST_DATATYPE_SHIFT)
| RADEON_GMC_CLR_CMP_CNTL_DIS
| RADEON_GMC_DST_PITCH_OFFSET_CNTL);
@@ -947,7 +947,7 @@ Bool RADEONAccelInit(ScreenPtr pScreen)
if (!info->useEXA) {
XAAInfoRecPtr a;
- if (!(a = info->accel = XAACreateInfoRec())) {
+ if (!(a = info->accel_state->accel = XAACreateInfoRec())) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "XAACreateInfoRec Error\n");
return FALSE;
}
@@ -985,7 +985,7 @@ void RADEONInit3DEngine(ScrnInfoPtr pScrn)
#endif
RADEONInit3DEngineMMIO(pScrn);
- info->XInited3D = TRUE;
+ info->accel_state->XInited3D = TRUE;
}
#ifdef USE_XAA
diff --git a/src/radeon_accelfuncs.c b/src/radeon_accelfuncs.c
index f83579fb..45eb6d55 100644
--- a/src/radeon_accelfuncs.c
+++ b/src/radeon_accelfuncs.c
@@ -137,14 +137,14 @@ FUNC_NAME(RADEONSetupForSolidFill)(ScrnInfoPtr pScrn,
ACCEL_PREAMBLE();
/* Save for later clipping */
- info->dp_gui_master_cntl_clip = (info->dp_gui_master_cntl
- | RADEON_GMC_BRUSH_SOLID_COLOR
- | RADEON_GMC_SRC_DATATYPE_COLOR
- | RADEON_ROP[rop].pattern);
+ info->accel_state->dp_gui_master_cntl_clip = (info->accel_state->dp_gui_master_cntl
+ | RADEON_GMC_BRUSH_SOLID_COLOR
+ | RADEON_GMC_SRC_DATATYPE_COLOR
+ | RADEON_ROP[rop].pattern);
BEGIN_ACCEL(4);
- OUT_ACCEL_REG(RADEON_DP_GUI_MASTER_CNTL, info->dp_gui_master_cntl_clip);
+ OUT_ACCEL_REG(RADEON_DP_GUI_MASTER_CNTL, info->accel_state->dp_gui_master_cntl_clip);
OUT_ACCEL_REG(RADEON_DP_BRUSH_FRGD_CLR, color);
OUT_ACCEL_REG(RADEON_DP_WRITE_MASK, planemask);
OUT_ACCEL_REG(RADEON_DP_CNTL, (RADEON_DST_X_LEFT_TO_RIGHT
@@ -172,7 +172,7 @@ FUNC_NAME(RADEONSubsequentSolidFillRect)(ScrnInfoPtr pScrn,
BEGIN_ACCEL(3);
- OUT_ACCEL_REG(RADEON_DST_PITCH_OFFSET, info->dst_pitch_offset |
+ OUT_ACCEL_REG(RADEON_DST_PITCH_OFFSET, info->accel_state->dst_pitch_offset |
((info->tilingEnabled && (y <= pScrn->virtualY)) ? RADEON_DST_TILE_MACRO : 0));
OUT_ACCEL_REG(RADEON_DST_Y_X, (y << 16) | x);
OUT_ACCEL_REG(RADEON_DST_WIDTH_HEIGHT, (w << 16) | h);
@@ -191,10 +191,10 @@ FUNC_NAME(RADEONSetupForSolidLine)(ScrnInfoPtr pScrn,
ACCEL_PREAMBLE();
/* Save for later clipping */
- info->dp_gui_master_cntl_clip = (info->dp_gui_master_cntl
- | RADEON_GMC_BRUSH_SOLID_COLOR
- | RADEON_GMC_SRC_DATATYPE_COLOR
- | RADEON_ROP[rop].pattern);
+ info->accel_state->dp_gui_master_cntl_clip = (info->accel_state->dp_gui_master_cntl
+ | RADEON_GMC_BRUSH_SOLID_COLOR
+ | RADEON_GMC_SRC_DATATYPE_COLOR
+ | RADEON_ROP[rop].pattern);
if (info->ChipFamily >= CHIP_FAMILY_RV200) {
BEGIN_ACCEL(1);
@@ -205,7 +205,7 @@ FUNC_NAME(RADEONSetupForSolidLine)(ScrnInfoPtr pScrn,
BEGIN_ACCEL(3);
- OUT_ACCEL_REG(RADEON_DP_GUI_MASTER_CNTL, info->dp_gui_master_cntl_clip);
+ OUT_ACCEL_REG(RADEON_DP_GUI_MASTER_CNTL, info->accel_state->dp_gui_master_cntl_clip);
OUT_ACCEL_REG(RADEON_DP_BRUSH_FRGD_CLR, color);
OUT_ACCEL_REG(RADEON_DP_WRITE_MASK, planemask);
@@ -236,7 +236,7 @@ FUNC_NAME(RADEONSubsequentSolidHorVertLine)(ScrnInfoPtr pScrn,
OUT_ACCEL_REG(RADEON_DP_CNTL, (RADEON_DST_X_LEFT_TO_RIGHT
| RADEON_DST_Y_TOP_TO_BOTTOM));
- OUT_ACCEL_REG(RADEON_DST_PITCH_OFFSET, info->dst_pitch_offset |
+ OUT_ACCEL_REG(RADEON_DST_PITCH_OFFSET, info->accel_state->dst_pitch_offset |
((info->tilingEnabled && (y <= pScrn->virtualY)) ? RADEON_DST_TILE_MACRO : 0));
OUT_ACCEL_REG(RADEON_DST_Y_X, (y << 16) | x);
OUT_ACCEL_REG(RADEON_DST_WIDTH_HEIGHT, (w << 16) | h);
@@ -269,7 +269,7 @@ FUNC_NAME(RADEONSubsequentSolidTwoPointLine)(ScrnInfoPtr pScrn,
BEGIN_ACCEL(3);
- OUT_ACCEL_REG(RADEON_DST_PITCH_OFFSET, info->dst_pitch_offset |
+ OUT_ACCEL_REG(RADEON_DST_PITCH_OFFSET, info->accel_state->dst_pitch_offset |
((info->tilingEnabled && (ya <= pScrn->virtualY)) ? RADEON_DST_TILE_MACRO : 0));
OUT_ACCEL_REG(RADEON_DST_LINE_START, (ya << 16) | xa);
OUT_ACCEL_REG(RADEON_DST_LINE_END, (yb << 16) | xb);
@@ -298,8 +298,8 @@ FUNC_NAME(RADEONSetupForDashedLine)(ScrnInfoPtr pScrn,
ACCEL_PREAMBLE();
/* Save for determining whether or not to draw last pixel */
- info->dashLen = length;
- info->dashPattern = pat;
+ info->accel_state->dashLen = length;
+ info->accel_state->dashPattern = pat;
#if X_BYTE_ORDER == X_BIG_ENDIAN
# define PAT_SHIFT(pat, shift) (pat >> shift)
@@ -315,18 +315,18 @@ FUNC_NAME(RADEONSetupForDashedLine)(ScrnInfoPtr pScrn,
}
/* Save for later clipping */
- info->dp_gui_master_cntl_clip = (info->dp_gui_master_cntl
- | (bg == -1
- ? RADEON_GMC_BRUSH_32x1_MONO_FG_LA
- : RADEON_GMC_BRUSH_32x1_MONO_FG_BG)
- | RADEON_ROP[rop].pattern
- | RADEON_GMC_BYTE_LSB_TO_MSB);
- info->dash_fg = fg;
- info->dash_bg = bg;
+ info->accel_state->dp_gui_master_cntl_clip = (info->accel_state->dp_gui_master_cntl
+ | (bg == -1
+ ? RADEON_GMC_BRUSH_32x1_MONO_FG_LA
+ : RADEON_GMC_BRUSH_32x1_MONO_FG_BG)
+ | RADEON_ROP[rop].pattern
+ | RADEON_GMC_BYTE_LSB_TO_MSB);
+ info->accel_state->dash_fg = fg;
+ info->accel_state->dash_bg = bg;
BEGIN_ACCEL((bg == -1) ? 4 : 5);
- OUT_ACCEL_REG(RADEON_DP_GUI_MASTER_CNTL, info->dp_gui_master_cntl_clip);
+ OUT_ACCEL_REG(RADEON_DP_GUI_MASTER_CNTL, info->accel_state->dp_gui_master_cntl_clip);
OUT_ACCEL_REG(RADEON_DP_WRITE_MASK, planemask);
OUT_ACCEL_REG(RADEON_DP_BRUSH_FRGD_CLR, fg);
if (bg != -1)
@@ -348,7 +348,7 @@ FUNC_NAME(RADEONDashedLastPel)(ScrnInfoPtr pScrn,
int fg)
{
RADEONInfoPtr info = RADEONPTR(pScrn);
- uint32_t dp_gui_master_cntl = info->dp_gui_master_cntl_clip;
+ uint32_t dp_gui_master_cntl = info->accel_state->dp_gui_master_cntl_clip;
ACCEL_PREAMBLE();
dp_gui_master_cntl &= ~RADEON_GMC_BRUSH_DATATYPE_MASK;
@@ -362,15 +362,15 @@ FUNC_NAME(RADEONDashedLastPel)(ScrnInfoPtr pScrn,
OUT_ACCEL_REG(RADEON_DP_GUI_MASTER_CNTL, dp_gui_master_cntl);
OUT_ACCEL_REG(RADEON_DP_CNTL, (RADEON_DST_X_LEFT_TO_RIGHT
| RADEON_DST_Y_TOP_TO_BOTTOM));
- OUT_ACCEL_REG(RADEON_DST_PITCH_OFFSET, info->dst_pitch_offset |
+ OUT_ACCEL_REG(RADEON_DST_PITCH_OFFSET, info->accel_state->dst_pitch_offset |
((info->tilingEnabled && (y <= pScrn->virtualY)) ? RADEON_DST_TILE_MACRO : 0));
OUT_ACCEL_REG(RADEON_DP_BRUSH_FRGD_CLR, fg);
OUT_ACCEL_REG(RADEON_DST_Y_X, (y << 16) | x);
OUT_ACCEL_REG(RADEON_DST_WIDTH_HEIGHT, (1 << 16) | 1);
/* Restore old values */
- OUT_ACCEL_REG(RADEON_DP_GUI_MASTER_CNTL, info->dp_gui_master_cntl_clip);
- OUT_ACCEL_REG(RADEON_DP_BRUSH_FRGD_CLR, info->dash_fg);
+ OUT_ACCEL_REG(RADEON_DP_GUI_MASTER_CNTL, info->accel_state->dp_gui_master_cntl_clip);
+ OUT_ACCEL_REG(RADEON_DP_BRUSH_FRGD_CLR, info->accel_state->dash_fg);
FINISH_ACCEL();
BEGIN_ACCEL(2);
@@ -402,17 +402,17 @@ FUNC_NAME(RADEONSubsequentDashedTwoPointLine)(ScrnInfoPtr pScrn,
else shift = deltay;
shift += phase;
- shift %= info->dashLen;
+ shift %= info->accel_state->dashLen;
- if ((info->dashPattern >> shift) & 1)
- FUNC_NAME(RADEONDashedLastPel)(pScrn, xb, yb, info->dash_fg);
- else if (info->dash_bg != -1)
- FUNC_NAME(RADEONDashedLastPel)(pScrn, xb, yb, info->dash_bg);
+ if ((info->accel_state->dashPattern >> shift) & 1)
+ FUNC_NAME(RADEONDashedLastPel)(pScrn, xb, yb, info->accel_state->dash_fg);
+ else if (info->accel_state->dash_bg != -1)
+ FUNC_NAME(RADEONDashedLastPel)(pScrn, xb, yb, info->accel_state->dash_bg);
}
BEGIN_ACCEL(4);
- OUT_ACCEL_REG(RADEON_DST_PITCH_OFFSET, info->dst_pitch_offset |
+ OUT_ACCEL_REG(RADEON_DST_PITCH_OFFSET, info->accel_state->dst_pitch_offset |
((info->tilingEnabled && (ya <= pScrn->virtualY)) ? RADEON_DST_TILE_MACRO : 0));
OUT_ACCEL_REG(RADEON_DST_LINE_START, (ya << 16) | xa);
OUT_ACCEL_REG(RADEON_DST_LINE_PATCOUNT, phase);
@@ -433,7 +433,7 @@ FUNC_NAME(RADEONSetTransparency)(ScrnInfoPtr pScrn,
{
RADEONInfoPtr info = RADEONPTR(pScrn);
- if ((trans_color != -1) || (info->XAAForceTransBlit == TRUE)) {
+ if ((trans_color != -1) || (info->accel_state->XAAForceTransBlit == TRUE)) {
ACCEL_PREAMBLE();
BEGIN_ACCEL(3);
@@ -461,20 +461,20 @@ FUNC_NAME(RADEONSetupForScreenToScreenCopy)(ScrnInfoPtr pScrn,
RADEONInfoPtr info = RADEONPTR(pScrn);
ACCEL_PREAMBLE();
- info->xdir = xdir;
- info->ydir = ydir;
+ info->accel_state->xdir = xdir;
+ info->accel_state->ydir = ydir;
/* Save for later clipping */
- info->dp_gui_master_cntl_clip = (info->dp_gui_master_cntl
- | RADEON_GMC_BRUSH_NONE
- | RADEON_GMC_SRC_DATATYPE_COLOR
- | RADEON_ROP[rop].rop
- | RADEON_DP_SRC_SOURCE_MEMORY
- | RADEON_GMC_SRC_PITCH_OFFSET_CNTL);
+ info->accel_state->dp_gui_master_cntl_clip = (info->accel_state->dp_gui_master_cntl
+ | RADEON_GMC_BRUSH_NONE
+ | RADEON_GMC_SRC_DATATYPE_COLOR
+ | RADEON_ROP[rop].rop
+ | RADEON_DP_SRC_SOURCE_MEMORY
+ | RADEON_GMC_SRC_PITCH_OFFSET_CNTL);
BEGIN_ACCEL(3);
- OUT_ACCEL_REG(RADEON_DP_GUI_MASTER_CNTL, info->dp_gui_master_cntl_clip);
+ OUT_ACCEL_REG(RADEON_DP_GUI_MASTER_CNTL, info->accel_state->dp_gui_master_cntl_clip);
OUT_ACCEL_REG(RADEON_DP_WRITE_MASK, planemask);
OUT_ACCEL_REG(RADEON_DP_CNTL,
((xdir >= 0 ? RADEON_DST_X_LEFT_TO_RIGHT : 0) |
@@ -487,7 +487,7 @@ FUNC_NAME(RADEONSetupForScreenToScreenCopy)(ScrnInfoPtr pScrn,
RADEON_WAIT_2D_IDLECLEAN | RADEON_WAIT_DMA_GUI_IDLE);
FINISH_ACCEL();
- info->trans_color = trans_color;
+ info->accel_state->trans_color = trans_color;
FUNC_NAME(RADEONSetTransparency)(pScrn, trans_color);
}
@@ -501,14 +501,14 @@ FUNC_NAME(RADEONSubsequentScreenToScreenCopy)(ScrnInfoPtr pScrn,
RADEONInfoPtr info = RADEONPTR(pScrn);
ACCEL_PREAMBLE();
- if (info->xdir < 0) xa += w - 1, xb += w - 1;
- if (info->ydir < 0) ya += h - 1, yb += h - 1;
+ if (info->accel_state->xdir < 0) xa += w - 1, xb += w - 1;
+ if (info->accel_state->ydir < 0) ya += h - 1, yb += h - 1;
BEGIN_ACCEL(5);
- OUT_ACCEL_REG(RADEON_SRC_PITCH_OFFSET, info->dst_pitch_offset |
+ OUT_ACCEL_REG(RADEON_SRC_PITCH_OFFSET, info->accel_state->dst_pitch_offset |
((info->tilingEnabled && (ya <= pScrn->virtualY)) ? RADEON_DST_TILE_MACRO : 0));
- OUT_ACCEL_REG(RADEON_DST_PITCH_OFFSET, info->dst_pitch_offset |
+ OUT_ACCEL_REG(RADEON_DST_PITCH_OFFSET, info->accel_state->dst_pitch_offset |
((info->tilingEnabled && (yb <= pScrn->virtualY)) ? RADEON_DST_TILE_MACRO : 0));
OUT_ACCEL_REG(RADEON_SRC_Y_X, (ya << 16) | xa);
OUT_ACCEL_REG(RADEON_DST_Y_X, (yb << 16) | xb);
@@ -552,19 +552,19 @@ FUNC_NAME(RADEONSetupForMono8x8PatternFill)(ScrnInfoPtr pScrn,
#endif
/* Save for later clipping */
- info->dp_gui_master_cntl_clip = (info->dp_gui_master_cntl
- | (bg == -1
- ? RADEON_GMC_BRUSH_8X8_MONO_FG_LA
- : RADEON_GMC_BRUSH_8X8_MONO_FG_BG)
- | RADEON_ROP[rop].pattern
+ info->accel_state->dp_gui_master_cntl_clip = (info->accel_state->dp_gui_master_cntl
+ | (bg == -1
+ ? RADEON_GMC_BRUSH_8X8_MONO_FG_LA
+ : RADEON_GMC_BRUSH_8X8_MONO_FG_BG)
+ | RADEON_ROP[rop].pattern
#if X_BYTE_ORDER == X_LITTLE_ENDIAN
- | RADEON_GMC_BYTE_MSB_TO_LSB
+ | RADEON_GMC_BYTE_MSB_TO_LSB
#endif
- );
+ );
BEGIN_ACCEL((bg == -1) ? 5 : 6);
- OUT_ACCEL_REG(RADEON_DP_GUI_MASTER_CNTL, info->dp_gui_master_cntl_clip);
+ OUT_ACCEL_REG(RADEON_DP_GUI_MASTER_CNTL, info->accel_state->dp_gui_master_cntl_clip);
OUT_ACCEL_REG(RADEON_DP_WRITE_MASK, planemask);
OUT_ACCEL_REG(RADEON_DP_BRUSH_FRGD_CLR, fg);
if (bg != -1)
@@ -600,7 +600,7 @@ FUNC_NAME(RADEONSubsequentMono8x8PatternFillRect)(ScrnInfoPtr pScrn,
BEGIN_ACCEL(4);
- OUT_ACCEL_REG(RADEON_DST_PITCH_OFFSET, info->dst_pitch_offset |
+ OUT_ACCEL_REG(RADEON_DST_PITCH_OFFSET, info->accel_state->dst_pitch_offset |
((info->tilingEnabled && (y <= pScrn->virtualY)) ? RADEON_DST_TILE_MACRO : 0));
OUT_ACCEL_REG(RADEON_BRUSH_Y_X, (patterny << 8) | patternx);
OUT_ACCEL_REG(RADEON_DST_Y_X, (y << 16) | x);
@@ -625,21 +625,21 @@ FUNC_NAME(RADEONSetupForColor8x8PatternFill)(ScrnInfoPtr pScrn,
ACCEL_PREAMBLE();
/* Save for later clipping */
- info->dp_gui_master_cntl_clip = (info->dp_gui_master_cntl
- | RADEON_GMC_BRUSH_8x8_COLOR
- | RADEON_GMC_SRC_DATATYPE_COLOR
- | RADEON_ROP[rop].pattern
- | RADEON_DP_SRC_SOURCE_MEMORY);
+ info->accel_state->dp_gui_master_cntl_clip = (info->accel_state->dp_gui_master_cntl
+ | RADEON_GMC_BRUSH_8x8_COLOR
+ | RADEON_GMC_SRC_DATATYPE_COLOR
+ | RADEON_ROP[rop].pattern
+ | RADEON_DP_SRC_SOURCE_MEMORY);
BEGIN_ACCEL(3);
- OUT_ACCEL_REG(RADEON_DP_GUI_MASTER_CNTL, info->dp_gui_master_cntl_clip);
+ OUT_ACCEL_REG(RADEON_DP_GUI_MASTER_CNTL, info->accel_state->dp_gui_master_cntl_clip);
OUT_ACCEL_REG(RADEON_DP_WRITE_MASK, planemask);
OUT_ACCEL_REG(RADEON_SRC_Y_X, (paty << 16) | patx);
FINISH_ACCEL();
- info->trans_color = trans_color;
+ info->accel_state->trans_color = trans_color;
FUNC_NAME(RADEONSetTransparency)(pScrn, trans_color);
}
@@ -655,7 +655,7 @@ FUNC_NAME(RADEONSubsequentColor8x8PatternFillRect)(ScrnInfoPtr pScrn,
BEGIN_ACCEL(4);
- OUT_ACCEL_REG(RADEON_DST_PITCH_OFFSET, info->dst_pitch_offset |
+ OUT_ACCEL_REG(RADEON_DST_PITCH_OFFSET, info->accel_state->dst_pitch_offset |
((info->tilingEnabled && (y <= pScrn->virtualY)) ? RADEON_DST_TILE_MACRO : 0));
OUT_ACCEL_REG(RADEON_BRUSH_Y_X, (paty << 16) | patx);
OUT_ACCEL_REG(RADEON_DST_Y_X, (y << 16) | x);
@@ -675,41 +675,41 @@ static void
RADEONCPScanlinePacket(ScrnInfoPtr pScrn, int bufno)
{
RADEONInfoPtr info = RADEONPTR(pScrn);
- int chunk_words = info->scanline_hpass * info->scanline_words;
+ int chunk_words = info->accel_state->scanline_hpass * info->accel_state->scanline_words;
ACCEL_PREAMBLE();
if (RADEON_VERBOSE) {
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"CPScanline Packet h=%d hpass=%d chunkwords=%d\n",
- info->scanline_h, info->scanline_hpass, chunk_words);
+ info->accel_state->scanline_h, info->accel_state->scanline_hpass, chunk_words);
}
BEGIN_RING(chunk_words+10);
OUT_RING(CP_PACKET3(RADEON_CP_PACKET3_CNTL_HOSTDATA_BLT,chunk_words+10-2));
- OUT_RING(info->dp_gui_master_cntl_clip);
- OUT_RING(info->dst_pitch_offset |
- ((info->tilingEnabled && (info->scanline_y <= pScrn->virtualY)) ? RADEON_DST_TILE_MACRO : 0));
- OUT_RING((info->scanline_y << 16) |
- (info->scanline_x1clip & 0xffff));
- OUT_RING(((info->scanline_y+info->scanline_hpass) << 16) |
- (info->scanline_x2clip & 0xffff));
- OUT_RING(info->scanline_fg);
- OUT_RING(info->scanline_bg);
- OUT_RING((info->scanline_y << 16) |
- (info->scanline_x & 0xffff));
- OUT_RING((info->scanline_hpass << 16) |
- (info->scanline_w & 0xffff));
+ OUT_RING(info->accel_state->dp_gui_master_cntl_clip);
+ OUT_RING(info->accel_state->dst_pitch_offset |
+ ((info->tilingEnabled && (info->accel_state->scanline_y <= pScrn->virtualY)) ? RADEON_DST_TILE_MACRO : 0));
+ OUT_RING((info->accel_state->scanline_y << 16) |
+ (info->accel_state->scanline_x1clip & 0xffff));
+ OUT_RING(((info->accel_state->scanline_y+info->accel_state->scanline_hpass) << 16) |
+ (info->accel_state->scanline_x2clip & 0xffff));
+ OUT_RING(info->accel_state->scanline_fg);
+ OUT_RING(info->accel_state->scanline_bg);
+ OUT_RING((info->accel_state->scanline_y << 16) |
+ (info->accel_state->scanline_x & 0xffff));
+ OUT_RING((info->accel_state->scanline_hpass << 16) |
+ (info->accel_state->scanline_w & 0xffff));
OUT_RING(chunk_words);
- info->scratch_buffer[bufno] = (unsigned char *)&__head[__count];
+ info->accel_state->scratch_buffer[bufno] = (unsigned char *)&__head[__count];
__count += chunk_words;
/* The ring can only be advanced after the __head and __count have
been adjusted above */
FINISH_ACCEL();
- info->scanline_y += info->scanline_hpass;
- info->scanline_h -= info->scanline_hpass;
+ info->accel_state->scanline_y += info->accel_state->scanline_hpass;
+ info->accel_state->scanline_h -= info->accel_state->scanline_hpass;
}
#endif
@@ -729,22 +729,22 @@ FUNC_NAME(RADEONSetupForScanlineCPUToScreenColorExpandFill)(ScrnInfoPtr pScrn,
RADEONInfoPtr info = RADEONPTR(pScrn);
ACCEL_PREAMBLE();
- info->scanline_bpp = 0;
+ info->accel_state->scanline_bpp = 0;
/* Save for later clipping */
- info->dp_gui_master_cntl_clip = (info->dp_gui_master_cntl
- | RADEON_GMC_DST_CLIPPING
- | RADEON_GMC_BRUSH_NONE
- | (bg == -1
- ? RADEON_GMC_SRC_DATATYPE_MONO_FG_LA
- : RADEON_GMC_SRC_DATATYPE_MONO_FG_BG)
- | RADEON_ROP[rop].rop
+ info->accel_state->dp_gui_master_cntl_clip = (info->accel_state->dp_gui_master_cntl
+ | RADEON_GMC_DST_CLIPPING
+ | RADEON_GMC_BRUSH_NONE
+ | (bg == -1
+ ? RADEON_GMC_SRC_DATATYPE_MONO_FG_LA
+ : RADEON_GMC_SRC_DATATYPE_MONO_FG_BG)
+ | RADEON_ROP[rop].rop
#if X_BYTE_ORDER == X_LITTLE_ENDIAN
- | RADEON_GMC_BYTE_LSB_TO_MSB
+ | RADEON_GMC_BYTE_LSB_TO_MSB
#else
- | RADEON_GMC_BYTE_MSB_TO_LSB
+ | RADEON_GMC_BYTE_MSB_TO_LSB
#endif
- | RADEON_DP_SRC_SOURCE_HOST_DATA);
+ | RADEON_DP_SRC_SOURCE_HOST_DATA);
#ifdef ACCEL_MMIO
@@ -755,15 +755,15 @@ FUNC_NAME(RADEONSetupForScanlineCPUToScreenColorExpandFill)(ScrnInfoPtr pScrn,
OUT_ACCEL_REG(RADEON_RBBM_GUICNTL, RADEON_HOST_DATA_SWAP_NONE);
#endif
- OUT_ACCEL_REG(RADEON_DP_GUI_MASTER_CNTL, info->dp_gui_master_cntl_clip);
+ OUT_ACCEL_REG(RADEON_DP_GUI_MASTER_CNTL, info->accel_state->dp_gui_master_cntl_clip);
OUT_ACCEL_REG(RADEON_DP_WRITE_MASK, planemask);
OUT_ACCEL_REG(RADEON_DP_SRC_FRGD_CLR, fg);
OUT_ACCEL_REG(RADEON_DP_SRC_BKGD_CLR, bg);
#else /* ACCEL_CP */
- info->scanline_fg = fg;
- info->scanline_bg = bg;
+ info->accel_state->scanline_fg = fg;
+ info->accel_state->scanline_bg = bg;
#if X_BYTE_ORDER == X_LITTLE_ENDIAN
BEGIN_ACCEL(1);
@@ -796,31 +796,31 @@ FUNC_NAME(RADEONSubsequentScanlineCPUToScreenColorExpandFill)(ScrnInfoPtr
#ifdef ACCEL_MMIO
ACCEL_PREAMBLE();
- info->scanline_h = h;
- info->scanline_words = (w + 31) >> 5;
+ info->accel_state->scanline_h = h;
+ info->accel_state->scanline_words = (w + 31) >> 5;
#ifdef __alpha__
/* Always use indirect for Alpha */
if (0)
#else
- if ((info->scanline_words * h) <= 9)
+ if ((info->accel_state->scanline_words * h) <= 9)
#endif
{
/* Turn on direct for less than 9 dword colour expansion */
- info->scratch_buffer[0] =
+ info->accel_state->scratch_buffer[0] =
(unsigned char *)(ADDRREG(RADEON_HOST_DATA_LAST)
- - (info->scanline_words - 1));
- info->scanline_direct = 1;
+ - (info->accel_state->scanline_words - 1));
+ info->accel_state->scanline_direct = 1;
} else {
/* Use indirect for anything else */
- info->scratch_buffer[0] = info->scratch_save;
- info->scanline_direct = 0;
+ info->accel_state->scratch_buffer[0] = info->accel_state->scratch_save;
+ info->accel_state->scanline_direct = 0;
}
- BEGIN_ACCEL(5 + (info->scanline_direct ?
- (info->scanline_words * h) : 0));
+ BEGIN_ACCEL(5 + (info->accel_state->scanline_direct ?
+ (info->accel_state->scanline_words * h) : 0));
- OUT_ACCEL_REG(RADEON_DST_PITCH_OFFSET, info->dst_pitch_offset |
+ OUT_ACCEL_REG(RADEON_DST_PITCH_OFFSET, info->accel_state->dst_pitch_offset |
((info->tilingEnabled && (y <= pScrn->virtualY)) ? RADEON_DST_TILE_MACRO : 0));
OUT_ACCEL_REG(RADEON_SC_TOP_LEFT, (y << 16) | ((x+skipleft)
& 0xffff));
@@ -833,17 +833,17 @@ FUNC_NAME(RADEONSubsequentScanlineCPUToScreenColorExpandFill)(ScrnInfoPtr
#else /* ACCEL_CP */
- info->scanline_x = x;
- info->scanline_y = y;
+ info->accel_state->scanline_x = x;
+ info->accel_state->scanline_y = y;
/* Have to pad the width here and use clipping engine */
- info->scanline_w = (w + 31) & ~31;
- info->scanline_h = h;
+ info->accel_state->scanline_w = (w + 31) & ~31;
+ info->accel_state->scanline_h = h;
- info->scanline_x1clip = x + skipleft;
- info->scanline_x2clip = x + w;
+ info->accel_state->scanline_x1clip = x + skipleft;
+ info->accel_state->scanline_x2clip = x + w;
- info->scanline_words = info->scanline_w / 32;
- info->scanline_hpass = min(h,(CP_BUFSIZE/info->scanline_words));
+ info->accel_state->scanline_words = info->accel_state->scanline_w / 32;
+ info->accel_state->scanline_hpass = min(h,(CP_BUFSIZE/info->accel_state->scanline_words));
RADEONCPScanlinePacket(pScrn, 0);
@@ -859,21 +859,21 @@ FUNC_NAME(RADEONSubsequentScanline)(ScrnInfoPtr pScrn,
{
RADEONInfoPtr info = RADEONPTR(pScrn);
#ifdef ACCEL_MMIO
- uint32_t *p = (pointer)info->scratch_buffer[bufno];
+ uint32_t *p = (pointer)info->accel_state->scratch_buffer[bufno];
int i;
- int left = info->scanline_words;
+ int left = info->accel_state->scanline_words;
volatile uint32_t *d;
ACCEL_PREAMBLE();
- if (info->scanline_direct) return;
+ if (info->accel_state->scanline_direct) return;
- --info->scanline_h;
+ --info->accel_state->scanline_h;
while (left) {
write_mem_barrier();
if (left <= 8) {
/* Last scanline - finish write to DATA_LAST */
- if (info->scanline_h == 0) {
+ if (info->accel_state->scanline_h == 0) {
BEGIN_ACCEL(left);
/* Unrolling doesn't improve performance */
for (d = ADDRREG(RADEON_HOST_DATA_LAST) - (left - 1); left; --left)
@@ -900,25 +900,25 @@ FUNC_NAME(RADEONSubsequentScanline)(ScrnInfoPtr pScrn,
#if X_BYTE_ORDER == X_BIG_ENDIAN
if (info->ChipFamily >= CHIP_FAMILY_R300) {
- if (info->scanline_bpp == 16) {
- RADEONCopySwap(info->scratch_buffer[bufno],
- info->scratch_buffer[bufno],
- info->scanline_words << 2,
+ if (info->accel_state->scanline_bpp == 16) {
+ RADEONCopySwap(info->accel_state->scratch_buffer[bufno],
+ info->accel_state->scratch_buffer[bufno],
+ info->accel_state->scanline_words << 2,
RADEON_HOST_DATA_SWAP_HDW);
- } else if (info->scanline_bpp < 15) {
- RADEONCopySwap(info->scratch_buffer[bufno],
- info->scratch_buffer[bufno],
- info->scanline_words << 2,
+ } else if (info->accel_state->scanline_bpp < 15) {
+ RADEONCopySwap(info->accel_state->scratch_buffer[bufno],
+ info->accel_state->scratch_buffer[bufno],
+ info->accel_state->scanline_words << 2,
RADEON_HOST_DATA_SWAP_32BIT);
}
}
#endif
- if (--info->scanline_hpass) {
- info->scratch_buffer[bufno] += 4 * info->scanline_words;
- } else if (info->scanline_h) {
- info->scanline_hpass =
- min(info->scanline_h,(CP_BUFSIZE/info->scanline_words));
+ if (--info->accel_state->scanline_hpass) {
+ info->accel_state->scratch_buffer[bufno] += 4 * info->accel_state->scanline_words;
+ } else if (info->accel_state->scanline_h) {
+ info->accel_state->scanline_hpass =
+ min(info->accel_state->scanline_h,(CP_BUFSIZE/info->accel_state->scanline_words));
RADEONCPScanlinePacket(pScrn, bufno);
}
@@ -937,16 +937,16 @@ FUNC_NAME(RADEONSetupForScanlineImageWrite)(ScrnInfoPtr pScrn,
RADEONInfoPtr info = RADEONPTR(pScrn);
ACCEL_PREAMBLE();
- info->scanline_bpp = bpp;
+ info->accel_state->scanline_bpp = bpp;
/* Save for later clipping */
- info->dp_gui_master_cntl_clip = (info->dp_gui_master_cntl
- | RADEON_GMC_DST_CLIPPING
- | RADEON_GMC_BRUSH_NONE
- | RADEON_GMC_SRC_DATATYPE_COLOR
- | RADEON_ROP[rop].rop
- | RADEON_GMC_BYTE_MSB_TO_LSB
- | RADEON_DP_SRC_SOURCE_HOST_DATA);
+ info->accel_state->dp_gui_master_cntl_clip = (info->accel_state->dp_gui_master_cntl
+ | RADEON_GMC_DST_CLIPPING
+ | RADEON_GMC_BRUSH_NONE
+ | RADEON_GMC_SRC_DATATYPE_COLOR
+ | RADEON_ROP[rop].rop
+ | RADEON_GMC_BYTE_MSB_TO_LSB
+ | RADEON_DP_SRC_SOURCE_HOST_DATA);
#ifdef ACCEL_MMIO
@@ -962,7 +962,7 @@ FUNC_NAME(RADEONSetupForScanlineImageWrite)(ScrnInfoPtr pScrn,
else
OUT_ACCEL_REG(RADEON_RBBM_GUICNTL, RADEON_HOST_DATA_SWAP_NONE);
#endif
- OUT_ACCEL_REG(RADEON_DP_GUI_MASTER_CNTL, info->dp_gui_master_cntl_clip);
+ OUT_ACCEL_REG(RADEON_DP_GUI_MASTER_CNTL, info->accel_state->dp_gui_master_cntl_clip);
#else /* ACCEL_CP */
@@ -984,7 +984,7 @@ FUNC_NAME(RADEONSetupForScanlineImageWrite)(ScrnInfoPtr pScrn,
FINISH_ACCEL();
- info->trans_color = trans_color;
+ info->accel_state->trans_color = trans_color;
FUNC_NAME(RADEONSetTransparency)(pScrn, trans_color);
}
@@ -1007,31 +1007,31 @@ FUNC_NAME(RADEONSubsequentScanlineImageWriteRect)(ScrnInfoPtr pScrn,
if (pScrn->bitsPerPixel == 8) shift = 3;
else if (pScrn->bitsPerPixel == 16) shift = 1;
- info->scanline_h = h;
- info->scanline_words = (w * info->scanline_bpp + 31) >> 5;
+ info->accel_state->scanline_h = h;
+ info->accel_state->scanline_words = (w * info->accel_state->scanline_bpp + 31) >> 5;
#ifdef __alpha__
/* Always use indirect for Alpha */
if (0)
#else
- if ((info->scanline_words * h) <= 9)
+ if ((info->accel_state->scanline_words * h) <= 9)
#endif
{
/* Turn on direct for less than 9 dword colour expansion */
- info->scratch_buffer[0]
+ info->accel_state->scratch_buffer[0]
= (unsigned char *)(ADDRREG(RADEON_HOST_DATA_LAST)
- - (info->scanline_words - 1));
- info->scanline_direct = 1;
+ - (info->accel_state->scanline_words - 1));
+ info->accel_state->scanline_direct = 1;
} else {
/* Use indirect for anything else */
- info->scratch_buffer[0] = info->scratch_save;
- info->scanline_direct = 0;
+ info->accel_state->scratch_buffer[0] = info->accel_state->scratch_save;
+ info->accel_state->scanline_direct = 0;
}
- BEGIN_ACCEL(5 + (info->scanline_direct ?
- (info->scanline_words * h) : 0));
+ BEGIN_ACCEL(5 + (info->accel_state->scanline_direct ?
+ (info->accel_state->scanline_words * h) : 0));
- OUT_ACCEL_REG(RADEON_DST_PITCH_OFFSET, info->dst_pitch_offset |
+ OUT_ACCEL_REG(RADEON_DST_PITCH_OFFSET, info->accel_state->dst_pitch_offset |
((info->tilingEnabled && (y <= pScrn->virtualY)) ? RADEON_DST_TILE_MACRO : 0));
OUT_ACCEL_REG(RADEON_SC_TOP_LEFT, (y << 16) | ((x+skipleft)
& 0xffff));
@@ -1050,17 +1050,17 @@ FUNC_NAME(RADEONSubsequentScanlineImageWriteRect)(ScrnInfoPtr pScrn,
if (pScrn->bitsPerPixel == 8) pad = 3;
else if (pScrn->bitsPerPixel == 16) pad = 1;
- info->scanline_x = x;
- info->scanline_y = y;
+ info->accel_state->scanline_x = x;
+ info->accel_state->scanline_y = y;
/* Have to pad the width here and use clipping engine */
- info->scanline_w = (w + pad) & ~pad;
- info->scanline_h = h;
+ info->accel_state->scanline_w = (w + pad) & ~pad;
+ info->accel_state->scanline_h = h;
- info->scanline_x1clip = x + skipleft;
- info->scanline_x2clip = x + w;
+ info->accel_state->scanline_x1clip = x + skipleft;
+ info->accel_state->scanline_x2clip = x + w;
- info->scanline_words = (w * info->scanline_bpp + 31) / 32;
- info->scanline_hpass = min(h,(CP_BUFSIZE/info->scanline_words));
+ info->accel_state->scanline_words = (w * info->accel_state->scanline_bpp + 31) / 32;
+ info->accel_state->scanline_hpass = min(h,(CP_BUFSIZE/info->accel_state->scanline_words));
RADEONCPScanlinePacket(pScrn, 0);
@@ -1110,7 +1110,7 @@ FUNC_NAME(RADEONSetClippingRectangle)(ScrnInfoPtr pScrn,
BEGIN_ACCEL(3);
- OUT_ACCEL_REG(RADEON_DP_GUI_MASTER_CNTL, (info->dp_gui_master_cntl_clip
+ OUT_ACCEL_REG(RADEON_DP_GUI_MASTER_CNTL, (info->accel_state->dp_gui_master_cntl_clip
| RADEON_GMC_DST_CLIPPING));
OUT_ACCEL_REG(RADEON_SC_TOP_LEFT, tmp1);
OUT_ACCEL_REG(RADEON_SC_BOTTOM_RIGHT, tmp2);
@@ -1122,7 +1122,7 @@ FUNC_NAME(RADEONSetClippingRectangle)(ScrnInfoPtr pScrn,
RADEON_WAIT_2D_IDLECLEAN | RADEON_WAIT_DMA_GUI_IDLE);
FINISH_ACCEL();
- FUNC_NAME(RADEONSetTransparency)(pScrn, info->trans_color);
+ FUNC_NAME(RADEONSetTransparency)(pScrn, info->accel_state->trans_color);
}
/* Disable the clipping rectangle */
@@ -1134,7 +1134,7 @@ FUNC_NAME(RADEONDisableClipping)(ScrnInfoPtr pScrn)
BEGIN_ACCEL(3);
- OUT_ACCEL_REG(RADEON_DP_GUI_MASTER_CNTL, info->dp_gui_master_cntl_clip);
+ OUT_ACCEL_REG(RADEON_DP_GUI_MASTER_CNTL, info->accel_state->dp_gui_master_cntl_clip);
OUT_ACCEL_REG(RADEON_SC_TOP_LEFT, 0);
OUT_ACCEL_REG(RADEON_SC_BOTTOM_RIGHT, (RADEON_DEFAULT_SC_RIGHT_MAX |
RADEON_DEFAULT_SC_BOTTOM_MAX));
@@ -1146,7 +1146,7 @@ FUNC_NAME(RADEONDisableClipping)(ScrnInfoPtr pScrn)
RADEON_WAIT_2D_IDLECLEAN | RADEON_WAIT_DMA_GUI_IDLE);
FINISH_ACCEL();
- FUNC_NAME(RADEONSetTransparency)(pScrn, info->trans_color);
+ FUNC_NAME(RADEONSetTransparency)(pScrn, info->accel_state->trans_color);
}
void
@@ -1203,12 +1203,12 @@ FUNC_NAME(RADEONAccelInit)(ScreenPtr pScreen, XAAInfoRecPtr a)
| ROP_NEEDS_SOURCE
| LEFT_EDGE_CLIPPING_NEGATIVE_X);
a->NumScanlineColorExpandBuffers = 1;
- a->ScanlineColorExpandBuffers = info->scratch_buffer;
- if (!info->scratch_save)
- info->scratch_save
+ a->ScanlineColorExpandBuffers = info->accel_state->scratch_buffer;
+ if (!info->accel_state->scratch_save)
+ info->accel_state->scratch_save
= xalloc(((pScrn->virtualX+31)/32*4)
+ (pScrn->virtualX * info->CurrentLayout.pixel_bytes));
- info->scratch_buffer[0] = info->scratch_save;
+ info->accel_state->scratch_buffer[0] = info->accel_state->scratch_save;
a->SetupForScanlineCPUToScreenColorExpandFill
= FUNC_NAME(RADEONSetupForScanlineCPUToScreenColorExpandFill);
a->SubsequentScanlineCPUToScreenColorExpandFill
@@ -1299,7 +1299,7 @@ FUNC_NAME(RADEONAccelInit)(ScreenPtr pScreen, XAAInfoRecPtr a)
/* ImageWrite */
a->NumScanlineImageWriteBuffers = 1;
- a->ScanlineImageWriteBuffers = info->scratch_buffer;
+ a->ScanlineImageWriteBuffers = info->accel_state->scratch_buffer;
a->SetupForScanlineImageWrite
= FUNC_NAME(RADEONSetupForScanlineImageWrite);
a->SubsequentScanlineImageWriteRect
diff --git a/src/radeon_commonfuncs.c b/src/radeon_commonfuncs.c
index 00def667..a70a2751 100644
--- a/src/radeon_commonfuncs.c
+++ b/src/radeon_commonfuncs.c
@@ -58,7 +58,8 @@ static void FUNC_NAME(RADEONInit3DEngine)(ScrnInfoPtr pScrn)
uint32_t gb_tile_config, su_reg_dest, vap_cntl;
ACCEL_PREAMBLE();
- info->texW[0] = info->texH[0] = info->texW[1] = info->texH[1] = 1;
+ info->accel_state->texW[0] = info->accel_state->texH[0] =
+ info->accel_state->texW[1] = info->accel_state->texH[1] = 1;
if (IS_R300_3D || IS_R500_3D) {
@@ -70,7 +71,7 @@ static void FUNC_NAME(RADEONInit3DEngine)(ScrnInfoPtr pScrn)
gb_tile_config = (R300_ENABLE_TILING | R300_TILE_SIZE_16 | R300_SUBPIXEL_1_16);
- switch(info->num_gb_pipes) {
+ switch(info->accel_state->num_gb_pipes) {
case 2: gb_tile_config |= R300_PIPE_COUNT_R300; break;
case 3: gb_tile_config |= R300_PIPE_COUNT_R420_3P; break;
case 4: gb_tile_config |= R300_PIPE_COUNT_R420; break;
@@ -87,7 +88,7 @@ static void FUNC_NAME(RADEONInit3DEngine)(ScrnInfoPtr pScrn)
FINISH_ACCEL();
if (IS_R500_3D) {
- su_reg_dest = ((1 << info->num_gb_pipes) - 1);
+ su_reg_dest = ((1 << info->accel_state->num_gb_pipes) - 1);
BEGIN_ACCEL(2);
OUT_ACCEL_REG(R500_SU_REG_DEST, su_reg_dest);
OUT_ACCEL_REG(R500_VAP_INDEX_OFFSET, 0);
@@ -146,7 +147,7 @@ static void FUNC_NAME(RADEONInit3DEngine)(ScrnInfoPtr pScrn)
FINISH_ACCEL();
/* setup the VAP */
- if (info->has_tcl)
+ if (info->accel_state->has_tcl)
vap_cntl = ((5 << R300_PVS_NUM_SLOTS_SHIFT) |
(5 << R300_PVS_NUM_CNTLRS_SHIFT) |
(9 << R300_VF_MAX_VTX_NUM_SHIFT));
@@ -170,14 +171,14 @@ static void FUNC_NAME(RADEONInit3DEngine)(ScrnInfoPtr pScrn)
else
vap_cntl |= (4 << R300_PVS_NUM_FPUS_SHIFT);
- if (info->has_tcl)
+ if (info->accel_state->has_tcl)
BEGIN_ACCEL(15);
else
BEGIN_ACCEL(9);
OUT_ACCEL_REG(R300_VAP_VTX_STATE_CNTL, 0);
OUT_ACCEL_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0);
- if (info->has_tcl)
+ if (info->accel_state->has_tcl)
OUT_ACCEL_REG(R300_VAP_CNTL_STATUS, 0);
else
OUT_ACCEL_REG(R300_VAP_CNTL_STATUS, R300_PVS_BYPASS);
@@ -207,7 +208,7 @@ static void FUNC_NAME(RADEONInit3DEngine)(ScrnInfoPtr pScrn)
((R300_WRITE_ENA_X | R300_WRITE_ENA_Y | R300_WRITE_ENA_Z | R300_WRITE_ENA_W)
<< R300_WRITE_ENA_2_SHIFT)));
- if (info->has_tcl) {
+ if (info->accel_state->has_tcl) {
OUT_ACCEL_REG(R300_VAP_PVS_FLOW_CNTL_OPC, 0);
OUT_ACCEL_REG(R300_VAP_GB_VERT_CLIP_ADJ, 0x3f800000);
OUT_ACCEL_REG(R300_VAP_GB_VERT_DISC_ADJ, 0x3f800000);
@@ -218,7 +219,7 @@ static void FUNC_NAME(RADEONInit3DEngine)(ScrnInfoPtr pScrn)
FINISH_ACCEL();
/* pre-load the vertex shaders */
- if (info->has_tcl) {
+ if (info->accel_state->has_tcl) {
/* exa mask/Xv bicubic shader program */
BEGIN_ACCEL(13);
OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_INDX_REG, 0);
diff --git a/src/radeon_dga.c b/src/radeon_dga.c
index d623fe43..1d4d6ca3 100644
--- a/src/radeon_dga.c
+++ b/src/radeon_dga.c
@@ -126,12 +126,12 @@ SECOND_PASS:
}
#endif /* USE_EXA */
#ifdef USE_XAA
- if (!info->useEXA && info->accel) {
- if (info->accel->SetupForSolidFill &&
- info->accel->SubsequentSolidFillRect)
+ if (!info->useEXA && info->accel_state->accel) {
+ if (info->accel_state->accel->SetupForSolidFill &&
+ info->accel_state->accel->SubsequentSolidFillRect)
currentMode->flags |= DGA_FILL_RECT;
- if (info->accel->SetupForScreenToScreenCopy &&
- info->accel->SubsequentScreenToScreenCopy)
+ if (info->accel_state->accel->SetupForScreenToScreenCopy &&
+ info->accel_state->accel->SubsequentScreenToScreenCopy)
currentMode->flags |= DGA_BLIT_RECT | DGA_BLIT_RECT_TRANS;
if (currentMode->flags &
(DGA_PIXMAP_AVAILABLE | DGA_FILL_RECT |
@@ -265,13 +265,13 @@ Bool RADEONDGAInit(ScreenPtr pScreen)
}
#endif /* USE_EXA */
#ifdef USE_XAA
- if (!info->useEXA && info->accel) {
- info->DGAFuncs.Sync = info->accel->Sync;
- if (info->accel->SetupForSolidFill &&
- info->accel->SubsequentSolidFillRect)
+ if (!info->useEXA && info->accel_state->accel) {
+ info->DGAFuncs.Sync = info->accel_state->accel->Sync;
+ if (info->accel_state->accel->SetupForSolidFill &&
+ info->accel_state->accel->SubsequentSolidFillRect)
info->DGAFuncs.FillRect = RADEON_FillRect;
- if (info->accel->SetupForScreenToScreenCopy &&
- info->accel->SubsequentScreenToScreenCopy) {
+ if (info->accel_state->accel->SetupForScreenToScreenCopy &&
+ info->accel_state->accel->SubsequentScreenToScreenCopy) {
info->DGAFuncs.BlitRect = RADEON_BlitRect;
info->DGAFuncs.BlitTransRect = RADEON_BlitTransRect;
}
@@ -383,8 +383,8 @@ static void RADEON_FillRect(ScrnInfoPtr pScrn,
#endif /* USE_EXA */
#ifdef USE_XAA
if (!info->useEXA) {
- (*info->accel->SetupForSolidFill)(pScrn, color, GXcopy, (uint32_t)(~0));
- (*info->accel->SubsequentSolidFillRect)(pScrn, x, y, w, h);
+ (*info->accel_state->accel->SetupForSolidFill)(pScrn, color, GXcopy, (uint32_t)(~0));
+ (*info->accel_state->accel->SubsequentSolidFillRect)(pScrn, x, y, w, h);
if (pScrn->bitsPerPixel == info->CurrentLayout.bitsPerPixel)
RADEON_MARK_SYNC(info, pScrn);
}
@@ -413,10 +413,10 @@ static void RADEON_BlitRect(ScrnInfoPtr pScrn,
#endif /* USE_EXA */
#ifdef USE_XAA
if (!info->useEXA) {
- (*info->accel->SetupForScreenToScreenCopy)(pScrn, xdir, ydir,
- GXcopy, (uint32_t)(~0), -1);
- (*info->accel->SubsequentScreenToScreenCopy)(pScrn, srcx, srcy,
- dstx, dsty, w, h);
+ (*info->accel_state->accel->SetupForScreenToScreenCopy)(pScrn, xdir, ydir,
+ GXcopy, (uint32_t)(~0), -1);
+ (*info->accel_state->accel->SubsequentScreenToScreenCopy)(pScrn, srcx, srcy,
+ dstx, dsty, w, h);
if (pScrn->bitsPerPixel == info->CurrentLayout.bitsPerPixel)
RADEON_MARK_SYNC(info, pScrn);
}
@@ -431,14 +431,14 @@ static void RADEON_BlitTransRect(ScrnInfoPtr pScrn,
int xdir = ((srcx < dstx) && (srcy == dsty)) ? -1 : 1;
int ydir = (srcy < dsty) ? -1 : 1;
- info->XAAForceTransBlit = TRUE;
- (*info->accel->SetupForScreenToScreenCopy)(pScrn, xdir, ydir,
- GXcopy, (uint32_t)(~0), color);
+ info->accel_state->XAAForceTransBlit = TRUE;
+ (*info->accel_state->accel->SetupForScreenToScreenCopy)(pScrn, xdir, ydir,
+ GXcopy, (uint32_t)(~0), color);
- info->XAAForceTransBlit = FALSE;
+ info->accel_state->XAAForceTransBlit = FALSE;
- (*info->accel->SubsequentScreenToScreenCopy)(pScrn, srcx, srcy,
- dstx, dsty, w, h);
+ (*info->accel_state->accel->SubsequentScreenToScreenCopy)(pScrn, srcx, srcy,
+ dstx, dsty, w, h);
if (pScrn->bitsPerPixel == info->CurrentLayout.bitsPerPixel)
RADEON_MARK_SYNC(info, pScrn);
diff --git a/src/radeon_dri.c b/src/radeon_dri.c
index c0b809cd..c10301bd 100644
--- a/src/radeon_dri.c
+++ b/src/radeon_dri.c
@@ -363,7 +363,7 @@ static void RADEONEnterServer(ScreenPtr pScreen)
pSAREAPriv = DRIGetSAREAPrivate(pScrn->pScreen);
if (pSAREAPriv->ctxOwner != DRIGetContext(pScrn->pScreen)) {
- info->XInited3D = FALSE;
+ info->accel_state->XInited3D = FALSE;
info->cp->needCacheFlush = (info->ChipFamily >= CHIP_FAMILY_R300);
}
@@ -417,7 +417,7 @@ static void RADEONLeaveServer(ScreenPtr pScreen)
RADEONCP_RELEASE(pScrn, info);
#ifdef USE_EXA
- info->engineMode = EXA_ENGINEMODE_UNKNOWN;
+ info->accel_state->engineMode = EXA_ENGINEMODE_UNKNOWN;
#endif
}
@@ -641,12 +641,12 @@ static void RADEONDRIMoveBuffers(WindowPtr pParent, DDXPointRec ptOldOrg,
}
/* pretty much a hack. */
- info->dst_pitch_offset = info->backPitchOffset;
+ info->accel_state->dst_pitch_offset = info->backPitchOffset;
if (info->tilingEnabled)
- info->dst_pitch_offset |= RADEON_DST_TILE_MACRO;
+ info->accel_state->dst_pitch_offset |= RADEON_DST_TILE_MACRO;
- (*info->accel->SetupForScreenToScreenCopy)(pScrn, xdir, ydir, GXcopy,
- (uint32_t)(-1), -1);
+ (*info->accel_state->accel->SetupForScreenToScreenCopy)(pScrn, xdir, ydir, GXcopy,
+ (uint32_t)(-1), -1);
for (; nbox-- ; pbox++) {
int xa = pbox->x1;
@@ -664,10 +664,10 @@ static void RADEONDRIMoveBuffers(WindowPtr pParent, DDXPointRec ptOldOrg,
if (w <= 0) continue;
if (h <= 0) continue;
- (*info->accel->SubsequentScreenToScreenCopy)(pScrn,
- xa, ya,
- destx, desty,
- w, h);
+ (*info->accel_state->accel->SubsequentScreenToScreenCopy)(pScrn,
+ xa, ya,
+ destx, desty,
+ w, h);
if (info->depthMoves) {
RADEONScreenToScreenCopyDepth(pScrn,
@@ -677,14 +677,14 @@ static void RADEONDRIMoveBuffers(WindowPtr pParent, DDXPointRec ptOldOrg,
}
}
- info->dst_pitch_offset = info->frontPitchOffset;;
+ info->accel_state->dst_pitch_offset = info->frontPitchOffset;;
xfree(pptNew2);
xfree(pboxNew2);
xfree(pptNew1);
xfree(pboxNew1);
- info->accel->NeedToSync = TRUE;
+ info->accel_state->accel->NeedToSync = TRUE;
#endif /* USE_XAA */
}
@@ -1239,7 +1239,7 @@ static void RADEONDRICPInit(ScrnInfoPtr pScrn)
RADEONCP_START(pScrn, info);
#ifdef USE_XAA
if (!info->useEXA)
- info->dst_pitch_offset = info->frontPitchOffset;
+ info->accel_state->dst_pitch_offset = info->frontPitchOffset;
#endif
}
@@ -1926,7 +1926,7 @@ static void RADEONDRIRefreshArea(ScrnInfoPtr pScrn, RegionPtr pReg)
RADEONGetPixmapOffsetPitch(pPix, &src_pitch_offset);
dst_pitch_offset = src_pitch_offset + (info->backOffset >> 10);
RADEONGetDatatypeBpp(pScrn->bitsPerPixel, &datatype);
- info->xdir = info->ydir = 1;
+ info->accel_state->xdir = info->accel_state->ydir = 1;
RADEONDoPrepareCopyCP(pScrn, src_pitch_offset, dst_pitch_offset, datatype,
GXcopy, ~0);
@@ -1936,13 +1936,14 @@ static void RADEONDRIRefreshArea(ScrnInfoPtr pScrn, RegionPtr pReg)
#ifdef USE_XAA
if (!info->useEXA) {
/* Make sure accel has been properly inited */
- if (info->accel == NULL || info->accel->SetupForScreenToScreenCopy == NULL)
+ if (info->accel_state->accel == NULL ||
+ info->accel_state->accel->SetupForScreenToScreenCopy == NULL)
goto out;
if (info->tilingEnabled)
- info->dst_pitch_offset |= RADEON_DST_TILE_MACRO;
- (*info->accel->SetupForScreenToScreenCopy)(pScrn,
- 1, 1, GXcopy,
- (uint32_t)(-1), -1);
+ info->accel_state->dst_pitch_offset |= RADEON_DST_TILE_MACRO;
+ (*info->accel_state->accel->SetupForScreenToScreenCopy)(pScrn,
+ 1, 1, GXcopy,
+ (uint32_t)(-1), -1);
}
#endif
@@ -1959,18 +1960,18 @@ static void RADEONDRIRefreshArea(ScrnInfoPtr pScrn, RegionPtr pReg)
#ifdef USE_XAA
if (!info->useEXA) {
- (*info->accel->SubsequentScreenToScreenCopy)(pScrn, xa, ya,
- xa + info->backX,
- ya + info->backY,
- xb - xa + 1,
- yb - ya + 1);
+ (*info->accel_state->accel->SubsequentScreenToScreenCopy)(pScrn, xa, ya,
+ xa + info->backX,
+ ya + info->backY,
+ xb - xa + 1,
+ yb - ya + 1);
}
#endif
}
}
#ifdef USE_XAA
- info->dst_pitch_offset &= ~RADEON_DST_TILE_MACRO;
+ info->accel_state->dst_pitch_offset &= ~RADEON_DST_TILE_MACRO;
#endif
out:
diff --git a/src/radeon_driver.c b/src/radeon_driver.c
index 3e3d0b52..d485865f 100644
--- a/src/radeon_driver.c
+++ b/src/radeon_driver.c
@@ -1174,7 +1174,6 @@ static Bool RADEONPreInitVisual(ScrnInfoPtr pScrn)
xf86PrintDepthBpp(pScrn);
- info->fifo_slots = 0;
info->pix24bpp = xf86GetBppFromDepth(pScrn,
pScrn->depth);
info->CurrentLayout.bitsPerPixel = pScrn->bitsPerPixel;
@@ -1907,20 +1906,6 @@ static Bool RADEONPreInitChipType(ScrnInfoPtr pScrn)
return FALSE;
}
-
- if ((info->ChipFamily == CHIP_FAMILY_RS100) ||
- (info->ChipFamily == CHIP_FAMILY_RS200) ||
- (info->ChipFamily == CHIP_FAMILY_RS300) ||
- (info->ChipFamily == CHIP_FAMILY_RS400) ||
- (info->ChipFamily == CHIP_FAMILY_RS480) ||
- (info->ChipFamily == CHIP_FAMILY_RS600) ||
- (info->ChipFamily == CHIP_FAMILY_RS690) ||
- (info->ChipFamily == CHIP_FAMILY_RS740))
- info->has_tcl = FALSE;
- else {
- info->has_tcl = TRUE;
- }
-
return TRUE;
}
@@ -1974,6 +1959,25 @@ static Bool RADEONPreInitAccel(ScrnInfoPtr pScrn)
char *optstr;
#endif
+ if (!(info->accel_state = xcalloc(1, sizeof(struct radeon_accel_state)))) {
+ xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Unable to allocate accel_state rec!\n");
+ return FALSE;
+ }
+ info->accel_state->fifo_slots = 0;
+
+ if ((info->ChipFamily == CHIP_FAMILY_RS100) ||
+ (info->ChipFamily == CHIP_FAMILY_RS200) ||
+ (info->ChipFamily == CHIP_FAMILY_RS300) ||
+ (info->ChipFamily == CHIP_FAMILY_RS400) ||
+ (info->ChipFamily == CHIP_FAMILY_RS480) ||
+ (info->ChipFamily == CHIP_FAMILY_RS600) ||
+ (info->ChipFamily == CHIP_FAMILY_RS690) ||
+ (info->ChipFamily == CHIP_FAMILY_RS740))
+ info->accel_state->has_tcl = FALSE;
+ else {
+ info->accel_state->has_tcl = TRUE;
+ }
+
info->useEXA = FALSE;
if (info->ChipFamily >= CHIP_FAMILY_R600) {
@@ -3097,12 +3101,12 @@ static void RADEONBlockHandler(int i, pointer blockData,
(*info->VideoTimerCallback)(pScrn, currentTime.milliseconds);
#if defined(RENDER) && defined(USE_XAA)
- if(info->RenderCallback)
- (*info->RenderCallback)(pScrn);
+ if(info->accel_state->RenderCallback)
+ (*info->accel_state->RenderCallback)(pScrn);
#endif
#ifdef USE_EXA
- info->engineMode = EXA_ENGINEMODE_UNKNOWN;
+ info->accel_state->engineMode = EXA_ENGINEMODE_UNKNOWN;
#endif
}
@@ -3195,7 +3199,7 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
info->accelOn = FALSE;
#ifdef USE_XAA
- info->accel = NULL;
+ info->accel_state->accel = NULL;
#endif
#ifdef XF86DRI
pScrn->fbOffset = info->frontOffset;
@@ -3397,8 +3401,9 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
return FALSE;
#endif
- info->dst_pitch_offset = (((pScrn->displayWidth * info->CurrentLayout.pixel_bytes / 64)
- << 22) | ((info->fbLocation + pScrn->fbOffset) >> 10));
+ info->accel_state->dst_pitch_offset =
+ (((pScrn->displayWidth * info->CurrentLayout.pixel_bytes / 64)
+ << 22) | ((info->fbLocation + pScrn->fbOffset) >> 10));
/* Setup DRI after visuals have been established, but before fbScreenInit is
* called. fbScreenInit will eventually call the driver's InitGLXVisuals
@@ -3930,7 +3935,7 @@ static void RADEONAdjustMemMapRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save)
else
info->fbLocation = (info->mc_fb_location & 0xffff) << 16;
- info->dst_pitch_offset =
+ info->accel_state->dst_pitch_offset =
(((pScrn->displayWidth * info->CurrentLayout.pixel_bytes / 64)
<< 22) | ((info->fbLocation + pScrn->fbOffset) >> 10));
RADEONInitMemMapRegisters(pScrn, save, info);
@@ -5578,9 +5583,9 @@ static Bool RADEONCloseScreen(int scrnIndex, ScreenPtr pScreen)
#endif
#ifdef USE_XAA
- if(!info->useEXA && info->RenderTex) {
- xf86FreeOffscreenLinear(info->RenderTex);
- info->RenderTex = NULL;
+ if(!info->useEXA && info->accel_state->RenderTex) {
+ xf86FreeOffscreenLinear(info->accel_state->RenderTex);
+ info->accel_state->RenderTex = NULL;
}
#endif /* USE_XAA */
@@ -5591,21 +5596,21 @@ static Bool RADEONCloseScreen(int scrnIndex, ScreenPtr pScreen)
xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG,
"Disposing accel...\n");
#ifdef USE_EXA
- if (info->exa) {
+ if (info->accel_state->exa) {
exaDriverFini(pScreen);
- xfree(info->exa);
- info->exa = NULL;
+ xfree(info->accel_state->exa);
+ info->accel_state->exa = NULL;
}
#endif /* USE_EXA */
#ifdef USE_XAA
if (!info->useEXA) {
- if (info->accel)
- XAADestroyInfoRec(info->accel);
- info->accel = NULL;
+ if (info->accel_state->accel)
+ XAADestroyInfoRec(info->accel_state->accel);
+ info->accel_state->accel = NULL;
- if (info->scratch_save)
- xfree(info->scratch_save);
- info->scratch_save = NULL;
+ if (info->accel_state->scratch_save)
+ xfree(info->accel_state->scratch_save);
+ info->accel_state->scratch_save = NULL;
}
#endif /* USE_XAA */
diff --git a/src/radeon_exa.c b/src/radeon_exa.c
index 96d8ea45..d8dcbac9 100644
--- a/src/radeon_exa.c
+++ b/src/radeon_exa.c
@@ -164,10 +164,10 @@ static Bool RADEONGetOffsetPitch(PixmapPtr pPix, int bpp, uint32_t *pitch_offset
{
RINFO_FROM_SCREEN(pPix->drawable.pScreen);
- if (pitch > 16320 || pitch % info->exa->pixmapPitchAlign != 0)
+ if (pitch > 16320 || pitch % info->accel_state->exa->pixmapPitchAlign != 0)
RADEON_FALLBACK(("Bad pitch 0x%08x\n", pitch));
- if (offset % info->exa->pixmapOffsetAlign != 0)
+ if (offset % info->accel_state->exa->pixmapOffsetAlign != 0)
RADEON_FALLBACK(("Bad offset 0x%08x\n", offset));
pitch = pitch >> 6;
@@ -302,7 +302,7 @@ static void RADEONFinishAccess(PixmapPtr pPix, int index)
do { \
uint32_t wait_until = 0; \
BEGIN_ACCEL(1); \
- switch (info->engineMode) { \
+ switch (info->accel_state->engineMode) { \
case EXA_ENGINEMODE_UNKNOWN: \
wait_until |= RADEON_WAIT_HOST_IDLECLEAN | RADEON_WAIT_2D_IDLECLEAN; \
case EXA_ENGINEMODE_3D: \
@@ -312,14 +312,14 @@ do { \
} \
OUT_ACCEL_REG(RADEON_WAIT_UNTIL, wait_until); \
FINISH_ACCEL(); \
- info->engineMode = EXA_ENGINEMODE_2D; \
+ info->accel_state->engineMode = EXA_ENGINEMODE_2D; \
} while (0);
#define RADEON_SWITCH_TO_3D() \
do { \
uint32_t wait_until = 0; \
BEGIN_ACCEL(1); \
- switch (info->engineMode) { \
+ switch (info->accel_state->engineMode) { \
case EXA_ENGINEMODE_UNKNOWN: \
wait_until |= RADEON_WAIT_HOST_IDLECLEAN | RADEON_WAIT_3D_IDLECLEAN; \
case EXA_ENGINEMODE_2D: \
@@ -329,7 +329,7 @@ do { \
} \
OUT_ACCEL_REG(RADEON_WAIT_UNTIL, wait_until); \
FINISH_ACCEL(); \
- info->engineMode = EXA_ENGINEMODE_3D; \
+ info->accel_state->engineMode = EXA_ENGINEMODE_3D; \
} while (0);
#define ENTER_DRAW(x) TRACE
@@ -394,12 +394,12 @@ Bool RADEONSetupMemEXA (ScreenPtr pScreen)
int screen_size;
int byteStride = pScrn->displayWidth * cpp;
- if (info->exa != NULL) {
+ if (info->accel_state->exa != NULL) {
xf86DrvMsg(pScreen->myNum, X_ERROR, "Memory map already initialized\n");
return FALSE;
}
- info->exa = exaDriverAlloc();
- if (info->exa == NULL)
+ info->accel_state->exa = exaDriverAlloc();
+ if (info->accel_state->exa == NULL)
return FALSE;
/* Need to adjust screen size for 16 line tiles, and then make it align to.
@@ -410,12 +410,12 @@ Bool RADEONSetupMemEXA (ScreenPtr pScreen)
else
screen_size = pScrn->virtualY * byteStride;
- info->exa->memoryBase = info->FB;
- info->exa->memorySize = info->FbMapSize - info->FbSecureSize;
- info->exa->offScreenBase = screen_size;
+ info->accel_state->exa->memoryBase = info->FB;
+ info->accel_state->exa->memorySize = info->FbMapSize - info->FbSecureSize;
+ info->accel_state->exa->offScreenBase = screen_size;
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Allocating from a screen of %ld kb\n",
- info->exa->memorySize / 1024);
+ info->accel_state->exa->memorySize / 1024);
/* Reserve static area for hardware cursor */
@@ -429,8 +429,8 @@ Bool RADEONSetupMemEXA (ScreenPtr pScreen)
RADEONCrtcPrivatePtr radeon_crtc = crtc->driver_private;
radeon_crtc->cursor_offset =
- RADEON_ALIGN(info->exa->offScreenBase, align);
- info->exa->offScreenBase = radeon_crtc->cursor_offset + cursor_size;
+ RADEON_ALIGN(info->accel_state->exa->offScreenBase, align);
+ info->accel_state->exa->offScreenBase = radeon_crtc->cursor_offset + cursor_size;
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"Will use %d kb for hardware cursor %d at offset 0x%08x\n",
@@ -467,12 +467,12 @@ Bool RADEONSetupMemEXA (ScreenPtr pScreen)
* offscreen locations does.
*/
info->backPitch = pScrn->displayWidth;
- next = RADEON_ALIGN(info->exa->offScreenBase, RADEON_BUFFER_ALIGN);
+ next = RADEON_ALIGN(info->accel_state->exa->offScreenBase, RADEON_BUFFER_ALIGN);
if (!info->noBackBuffer &&
- next + screen_size <= info->exa->memorySize)
+ next + screen_size <= info->accel_state->exa->memorySize)
{
info->backOffset = next;
- info->exa->offScreenBase = next + screen_size;
+ info->accel_state->exa->offScreenBase = next + screen_size;
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"Will use %d kb for back buffer at offset 0x%08x\n",
screen_size / 1024, info->backOffset);
@@ -483,26 +483,26 @@ Bool RADEONSetupMemEXA (ScreenPtr pScreen)
*/
info->depthPitch = RADEON_ALIGN(pScrn->displayWidth, 32);
depth_size = RADEON_ALIGN(pScrn->virtualY, 16) * info->depthPitch * depthCpp;
- next = RADEON_ALIGN(info->exa->offScreenBase, RADEON_BUFFER_ALIGN);
- if (next + depth_size <= info->exa->memorySize)
+ next = RADEON_ALIGN(info->accel_state->exa->offScreenBase, RADEON_BUFFER_ALIGN);
+ if (next + depth_size <= info->accel_state->exa->memorySize)
{
info->depthOffset = next;
- info->exa->offScreenBase = next + depth_size;
+ info->accel_state->exa->offScreenBase = next + depth_size;
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"Will use %d kb for depth buffer at offset 0x%08x\n",
depth_size / 1024, info->depthOffset);
}
- info->textureSize *= (info->exa->memorySize -
- info->exa->offScreenBase) / 100;
+ info->textureSize *= (info->accel_state->exa->memorySize -
+ info->accel_state->exa->offScreenBase) / 100;
l = RADEONLog2(info->textureSize / RADEON_NR_TEX_REGIONS);
if (l < RADEON_LOG_TEX_GRANULARITY)
l = RADEON_LOG_TEX_GRANULARITY;
info->textureSize = (info->textureSize >> l) << l;
if (info->textureSize >= 512 * 1024) {
- info->textureOffset = info->exa->offScreenBase;
- info->exa->offScreenBase += info->textureSize;
+ info->textureOffset = info->accel_state->exa->offScreenBase;
+ info->accel_state->exa->offScreenBase += info->textureSize;
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"Will use %d kb for textures at offset 0x%08x\n",
info->textureSize / 1024, info->textureOffset);
@@ -518,8 +518,8 @@ Bool RADEONSetupMemEXA (ScreenPtr pScreen)
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"Will use %ld kb for X Server offscreen at offset 0x%08lx\n",
- (info->exa->memorySize - info->exa->offScreenBase) /
- 1024, info->exa->offScreenBase);
+ (info->accel_state->exa->memorySize - info->accel_state->exa->offScreenBase) /
+ 1024, info->accel_state->exa->offScreenBase);
return TRUE;
}
diff --git a/src/radeon_exa_funcs.c b/src/radeon_exa_funcs.c
index 56de23e6..783e83dc 100644
--- a/src/radeon_exa_funcs.c
+++ b/src/radeon_exa_funcs.c
@@ -65,7 +65,7 @@ FUNC_NAME(RADEONMarkSync)(ScreenPtr pScreen)
TRACE;
- return ++info->exaSyncMarker;
+ return ++info->accel_state->exaSyncMarker;
}
static void
@@ -76,12 +76,12 @@ FUNC_NAME(RADEONSync)(ScreenPtr pScreen, int marker)
TRACE;
- if (info->exaMarkerSynced != marker) {
+ if (info->accel_state->exaMarkerSynced != marker) {
FUNC_NAME(RADEONWaitForIdle)(pScrn);
- info->exaMarkerSynced = marker;
+ info->accel_state->exaMarkerSynced = marker;
}
- RADEONPTR(pScrn)->engineMode = EXA_ENGINEMODE_UNKNOWN;
+ RADEONPTR(pScrn)->accel_state->engineMode = EXA_ENGINEMODE_UNKNOWN;
}
static Bool
@@ -172,8 +172,8 @@ FUNC_NAME(RADEONDoPrepareCopy)(ScrnInfoPtr pScrn, uint32_t src_pitch_offset,
RADEON_GMC_CLR_CMP_CNTL_DIS);
OUT_ACCEL_REG(RADEON_DP_WRITE_MASK, planemask);
OUT_ACCEL_REG(RADEON_DP_CNTL,
- ((info->xdir >= 0 ? RADEON_DST_X_LEFT_TO_RIGHT : 0) |
- (info->ydir >= 0 ? RADEON_DST_Y_TOP_TO_BOTTOM : 0)));
+ ((info->accel_state->xdir >= 0 ? RADEON_DST_X_LEFT_TO_RIGHT : 0) |
+ (info->accel_state->ydir >= 0 ? RADEON_DST_Y_TOP_TO_BOTTOM : 0)));
OUT_ACCEL_REG(RADEON_DST_PITCH_OFFSET, dst_pitch_offset);
OUT_ACCEL_REG(RADEON_SRC_PITCH_OFFSET, src_pitch_offset);
FINISH_ACCEL();
@@ -190,8 +190,8 @@ FUNC_NAME(RADEONPrepareCopy)(PixmapPtr pSrc, PixmapPtr pDst,
TRACE;
- info->xdir = xdir;
- info->ydir = ydir;
+ info->accel_state->xdir = xdir;
+ info->accel_state->ydir = ydir;
if (pDst->drawable.bitsPerPixel == 24)
RADEON_FALLBACK(("24bpp unsupported"));
@@ -219,11 +219,11 @@ FUNC_NAME(RADEONCopy)(PixmapPtr pDst,
TRACE;
- if (info->xdir < 0) {
+ if (info->accel_state->xdir < 0) {
srcX += w - 1;
dstX += w - 1;
}
- if (info->ydir < 0) {
+ if (info->accel_state->ydir < 0) {
srcY += h - 1;
dstY += h - 1;
}
@@ -476,7 +476,7 @@ FUNC_NAME(RADEONDownloadFromScreen)(PixmapPtr pSrc, int x, int y, int w, int h,
drmCommandWriteRead(info->drmFD, DRM_RADEON_INDIRECT,
&indirect, sizeof(drmRadeonIndirect));
- info->exaMarkerSynced = info->exaSyncMarker;
+ info->accel_state->exaMarkerSynced = info->accel_state->exaSyncMarker;
return TRUE;
}
@@ -522,35 +522,35 @@ Bool FUNC_NAME(RADEONDrawInit)(ScreenPtr pScreen)
{
RINFO_FROM_SCREEN(pScreen);
- if (info->exa == NULL) {
+ if (info->accel_state->exa == NULL) {
xf86DrvMsg(pScreen->myNum, X_ERROR, "Memory map not set up\n");
return FALSE;
}
- info->exa->exa_major = EXA_VERSION_MAJOR;
- info->exa->exa_minor = EXA_VERSION_MINOR;
+ info->accel_state->exa->exa_major = EXA_VERSION_MAJOR;
+ info->accel_state->exa->exa_minor = EXA_VERSION_MINOR;
- info->exa->PrepareSolid = FUNC_NAME(RADEONPrepareSolid);
- info->exa->Solid = FUNC_NAME(RADEONSolid);
- info->exa->DoneSolid = FUNC_NAME(RADEONDoneSolid);
+ info->accel_state->exa->PrepareSolid = FUNC_NAME(RADEONPrepareSolid);
+ info->accel_state->exa->Solid = FUNC_NAME(RADEONSolid);
+ info->accel_state->exa->DoneSolid = FUNC_NAME(RADEONDoneSolid);
- info->exa->PrepareCopy = FUNC_NAME(RADEONPrepareCopy);
- info->exa->Copy = FUNC_NAME(RADEONCopy);
- info->exa->DoneCopy = FUNC_NAME(RADEONDoneCopy);
+ info->accel_state->exa->PrepareCopy = FUNC_NAME(RADEONPrepareCopy);
+ info->accel_state->exa->Copy = FUNC_NAME(RADEONCopy);
+ info->accel_state->exa->DoneCopy = FUNC_NAME(RADEONDoneCopy);
- info->exa->MarkSync = FUNC_NAME(RADEONMarkSync);
- info->exa->WaitMarker = FUNC_NAME(RADEONSync);
- info->exa->UploadToScreen = FUNC_NAME(RADEONUploadToScreen);
- info->exa->DownloadFromScreen = FUNC_NAME(RADEONDownloadFromScreen);
+ info->accel_state->exa->MarkSync = FUNC_NAME(RADEONMarkSync);
+ info->accel_state->exa->WaitMarker = FUNC_NAME(RADEONSync);
+ info->accel_state->exa->UploadToScreen = FUNC_NAME(RADEONUploadToScreen);
+ info->accel_state->exa->DownloadFromScreen = FUNC_NAME(RADEONDownloadFromScreen);
#if X_BYTE_ORDER == X_BIG_ENDIAN
- info->exa->PrepareAccess = RADEONPrepareAccess;
- info->exa->FinishAccess = RADEONFinishAccess;
+ info->accel_state->exa->PrepareAccess = RADEONPrepareAccess;
+ info->accel_state->exa->FinishAccess = RADEONFinishAccess;
#endif /* X_BYTE_ORDER == X_BIG_ENDIAN */
- info->exa->flags = EXA_OFFSCREEN_PIXMAPS;
- info->exa->pixmapOffsetAlign = RADEON_BUFFER_ALIGN + 1;
- info->exa->pixmapPitchAlign = 64;
+ info->accel_state->exa->flags = EXA_OFFSCREEN_PIXMAPS;
+ info->accel_state->exa->pixmapOffsetAlign = RADEON_BUFFER_ALIGN + 1;
+ info->accel_state->exa->pixmapPitchAlign = 64;
#ifdef RENDER
if (info->RenderAccel) {
@@ -565,11 +565,11 @@ Bool FUNC_NAME(RADEONDrawInit)(ScreenPtr pScreen)
) {
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Render acceleration "
"enabled for R300/R400/R500 type cards.\n");
- info->exa->CheckComposite = R300CheckComposite;
- info->exa->PrepareComposite =
+ info->accel_state->exa->CheckComposite = R300CheckComposite;
+ info->accel_state->exa->PrepareComposite =
FUNC_NAME(R300PrepareComposite);
- info->exa->Composite = FUNC_NAME(RadeonComposite);
- info->exa->DoneComposite = FUNC_NAME(RadeonDoneComposite);
+ info->accel_state->exa->Composite = FUNC_NAME(RadeonComposite);
+ info->accel_state->exa->DoneComposite = FUNC_NAME(RadeonDoneComposite);
} else
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "EXA Composite requires CP on R5xx/IGP\n");
} else if ((info->ChipFamily == CHIP_FAMILY_RV250) ||
@@ -578,19 +578,19 @@ Bool FUNC_NAME(RADEONDrawInit)(ScreenPtr pScreen)
(info->ChipFamily == CHIP_FAMILY_R200)) {
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Render acceleration "
"enabled for R200 type cards.\n");
- info->exa->CheckComposite = R200CheckComposite;
- info->exa->PrepareComposite =
+ info->accel_state->exa->CheckComposite = R200CheckComposite;
+ info->accel_state->exa->PrepareComposite =
FUNC_NAME(R200PrepareComposite);
- info->exa->Composite = FUNC_NAME(RadeonComposite);
- info->exa->DoneComposite = FUNC_NAME(RadeonDoneComposite);
+ info->accel_state->exa->Composite = FUNC_NAME(RadeonComposite);
+ info->accel_state->exa->DoneComposite = FUNC_NAME(RadeonDoneComposite);
} else {
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Render acceleration "
"enabled for R100 type cards.\n");
- info->exa->CheckComposite = R100CheckComposite;
- info->exa->PrepareComposite =
+ info->accel_state->exa->CheckComposite = R100CheckComposite;
+ info->accel_state->exa->PrepareComposite =
FUNC_NAME(R100PrepareComposite);
- info->exa->Composite = FUNC_NAME(RadeonComposite);
- info->exa->DoneComposite = FUNC_NAME(RadeonDoneComposite);
+ info->accel_state->exa->Composite = FUNC_NAME(RadeonComposite);
+ info->accel_state->exa->DoneComposite = FUNC_NAME(RadeonDoneComposite);
}
}
#endif
@@ -598,17 +598,17 @@ Bool FUNC_NAME(RADEONDrawInit)(ScreenPtr pScreen)
#if EXA_VERSION_MAJOR > 2 || (EXA_VERSION_MAJOR == 2 && EXA_VERSION_MINOR >= 3)
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Setting EXA maxPitchBytes\n");
- info->exa->maxPitchBytes = 16320;
- info->exa->maxX = 8192;
+ info->accel_state->exa->maxPitchBytes = 16320;
+ info->accel_state->exa->maxX = 8192;
#else
- info->exa->maxX = 16320 / 4;
+ info->accel_state->exa->maxX = 16320 / 4;
#endif
- info->exa->maxY = 8192;
+ info->accel_state->exa->maxY = 8192;
RADEONEngineInit(pScrn);
- if (!exaDriverInit(pScreen, info->exa)) {
- xfree(info->exa);
+ if (!exaDriverInit(pScreen, info->accel_state->exa)) {
+ xfree(info->accel_state->exa);
return FALSE;
}
exaMarkSync(pScreen);
diff --git a/src/radeon_exa_render.c b/src/radeon_exa_render.c
index 043b0d40..ddb28be0 100644
--- a/src/radeon_exa_render.c
+++ b/src/radeon_exa_render.c
@@ -389,8 +389,8 @@ static Bool FUNC_NAME(R100TextureSetup)(PicturePtr pPict, PixmapPtr pPix,
txformat |= RADEON_TXFORMAT_NON_POWER2;
txformat |= unit << 24; /* RADEON_TXFORMAT_ST_ROUTE_STQX */
- info->texW[unit] = 1;
- info->texH[unit] = 1;
+ info->accel_state->texW[unit] = 1;
+ info->accel_state->texH[unit] = 1;
switch (pPict->filter) {
case PictFilterNearest:
@@ -531,7 +531,7 @@ static Bool FUNC_NAME(R100PrepareComposite)(int op,
TRACE;
- if (!info->XInited3D)
+ if (!info->accel_state->XInited3D)
RADEONInit3DEngine(pScrn);
if (!RADEONGetDestFormat(pDstPicture, &dst_format))
@@ -702,8 +702,8 @@ static Bool FUNC_NAME(R200TextureSetup)(PicturePtr pPict, PixmapPtr pPix,
txformat |= R200_TXFORMAT_NON_POWER2;
txformat |= unit << R200_TXFORMAT_ST_ROUTE_SHIFT;
- info->texW[unit] = w;
- info->texH[unit] = h;
+ info->accel_state->texW[unit] = w;
+ info->accel_state->texH[unit] = h;
switch (pPict->filter) {
case PictFilterNearest:
@@ -830,7 +830,7 @@ static Bool FUNC_NAME(R200PrepareComposite)(int op, PicturePtr pSrcPicture,
TRACE;
- if (!info->XInited3D)
+ if (!info->accel_state->XInited3D)
RADEONInit3DEngine(pScrn);
if (!RADEONGetDestFormat(pDstPicture, &dst_format))
@@ -1045,8 +1045,8 @@ static Bool FUNC_NAME(R300TextureSetup)(PicturePtr pPict, PixmapPtr pPix,
*/
txformat0 |= R300_TXPITCH_EN;
- info->texW[unit] = w;
- info->texH[unit] = h;
+ info->accel_state->texW[unit] = w;
+ info->accel_state->texH[unit] = h;
if (pPict->repeat && !(unit == 0 && need_src_tile_x))
txfilter = R300_TX_CLAMP_S(R300_TX_CLAMP_WRAP);
@@ -1191,7 +1191,7 @@ static Bool FUNC_NAME(R300PrepareComposite)(int op, PicturePtr pSrcPicture,
TRACE;
- if (!info->XInited3D)
+ if (!info->accel_state->XInited3D)
RADEONInit3DEngine(pScrn);
if (!R300GetDestFormat(pDstPicture, &dst_format))
@@ -1236,7 +1236,7 @@ static Bool FUNC_NAME(R300PrepareComposite)(int op, PicturePtr pSrcPicture,
RADEON_SWITCH_TO_3D();
/* setup the VAP */
- if (info->has_tcl) {
+ if (info->accel_state->has_tcl) {
if (pMask)
BEGIN_ACCEL(8);
else
@@ -1296,7 +1296,7 @@ static Bool FUNC_NAME(R300PrepareComposite)(int op, PicturePtr pSrcPicture,
* - Xv
* Here we select the offset of the vertex program we want to use
*/
- if (info->has_tcl) {
+ if (info->accel_state->has_tcl) {
if (pMask) {
OUT_ACCEL_REG(R300_VAP_PVS_CODE_CNTL_0,
((0 << R300_PVS_FIRST_INST_SHIFT) |
@@ -2000,44 +2000,44 @@ static void FUNC_NAME(RadeonCompositeTile)(PixmapPtr pDst,
else
BEGIN_ACCEL(1 + vtx_count * 4);
- if (info->ChipFamily < CHIP_FAMILY_R200) {
+ if (info->ChipFamily < CHIP_FAMILY_R200)
OUT_ACCEL_REG(RADEON_SE_VF_CNTL, (RADEON_VF_PRIM_TYPE_RECTANGLE_LIST |
RADEON_VF_PRIM_WALK_DATA |
RADEON_VF_RADEON_MODE |
(3 << RADEON_VF_NUM_VERTICES_SHIFT)));
- } else {
+ else
OUT_ACCEL_REG(RADEON_SE_VF_CNTL, (RADEON_VF_PRIM_TYPE_QUAD_LIST |
RADEON_VF_PRIM_WALK_DATA |
(4 << RADEON_VF_NUM_VERTICES_SHIFT)));
- }
+
#endif
if (has_mask) {
if (info->ChipFamily >= CHIP_FAMILY_R200) {
VTX_OUT_MASK((float)dstX, (float)dstY,
- xFixedToFloat(srcTopLeft.x) / info->texW[0], xFixedToFloat(srcTopLeft.y) / info->texH[0],
- xFixedToFloat(maskTopLeft.x) / info->texW[1], xFixedToFloat(maskTopLeft.y) / info->texH[1]);
+ xFixedToFloat(srcTopLeft.x) / info->accel_state->texW[0], xFixedToFloat(srcTopLeft.y) / info->accel_state->texH[0],
+ xFixedToFloat(maskTopLeft.x) / info->accel_state->texW[1], xFixedToFloat(maskTopLeft.y) / info->accel_state->texH[1]);
}
VTX_OUT_MASK((float)dstX, (float)(dstY + h),
- xFixedToFloat(srcBottomLeft.x) / info->texW[0], xFixedToFloat(srcBottomLeft.y) / info->texH[0],
- xFixedToFloat(maskBottomLeft.x) / info->texW[1], xFixedToFloat(maskBottomLeft.y) / info->texH[1]);
+ xFixedToFloat(srcBottomLeft.x) / info->accel_state->texW[0], xFixedToFloat(srcBottomLeft.y) / info->accel_state->texH[0],
+ xFixedToFloat(maskBottomLeft.x) / info->accel_state->texW[1], xFixedToFloat(maskBottomLeft.y) / info->accel_state->texH[1]);
VTX_OUT_MASK((float)(dstX + w), (float)(dstY + h),
- xFixedToFloat(srcBottomRight.x) / info->texW[0], xFixedToFloat(srcBottomRight.y) / info->texH[0],
- xFixedToFloat(maskBottomRight.x) / info->texW[1], xFixedToFloat(maskBottomRight.y) / info->texH[1]);
+ xFixedToFloat(srcBottomRight.x) / info->accel_state->texW[0], xFixedToFloat(srcBottomRight.y) / info->accel_state->texH[0],
+ xFixedToFloat(maskBottomRight.x) / info->accel_state->texW[1], xFixedToFloat(maskBottomRight.y) / info->accel_state->texH[1]);
VTX_OUT_MASK((float)(dstX + w), (float)dstY,
- xFixedToFloat(srcTopRight.x) / info->texW[0], xFixedToFloat(srcTopRight.y) / info->texH[0],
- xFixedToFloat(maskTopRight.x) / info->texW[1], xFixedToFloat(maskTopRight.y) / info->texH[1]);
+ xFixedToFloat(srcTopRight.x) / info->accel_state->texW[0], xFixedToFloat(srcTopRight.y) / info->accel_state->texH[0],
+ xFixedToFloat(maskTopRight.x) / info->accel_state->texW[1], xFixedToFloat(maskTopRight.y) / info->accel_state->texH[1]);
} else {
if (info->ChipFamily >= CHIP_FAMILY_R200) {
VTX_OUT((float)dstX, (float)dstY,
- xFixedToFloat(srcTopLeft.x) / info->texW[0], xFixedToFloat(srcTopLeft.y) / info->texH[0]);
+ xFixedToFloat(srcTopLeft.x) / info->accel_state->texW[0], xFixedToFloat(srcTopLeft.y) / info->accel_state->texH[0]);
}
VTX_OUT((float)dstX, (float)(dstY + h),
- xFixedToFloat(srcBottomLeft.x) / info->texW[0], xFixedToFloat(srcBottomLeft.y) / info->texH[0]);
+ xFixedToFloat(srcBottomLeft.x) / info->accel_state->texW[0], xFixedToFloat(srcBottomLeft.y) / info->accel_state->texH[0]);
VTX_OUT((float)(dstX + w), (float)(dstY + h),
- xFixedToFloat(srcBottomRight.x) / info->texW[0], xFixedToFloat(srcBottomRight.y) / info->texH[0]);
+ xFixedToFloat(srcBottomRight.x) / info->accel_state->texW[0], xFixedToFloat(srcBottomRight.y) / info->accel_state->texH[0]);
VTX_OUT((float)(dstX + w), (float)dstY,
- xFixedToFloat(srcTopRight.x) / info->texW[0], xFixedToFloat(srcTopRight.y) / info->texH[0]);
+ xFixedToFloat(srcTopRight.x) / info->accel_state->texW[0], xFixedToFloat(srcTopRight.y) / info->accel_state->texH[0]);
}
if (IS_R300_3D || IS_R500_3D)
diff --git a/src/radeon_render.c b/src/radeon_render.c
index dbd5b799..6668fe04 100644
--- a/src/radeon_render.c
+++ b/src/radeon_render.c
@@ -268,7 +268,7 @@ RemoveLinear (FBLinearPtr linear)
{
RADEONInfoPtr info = (RADEONInfoPtr)(linear->devPrivate.ptr);
- info->RenderTex = NULL;
+ info->accel_state->RenderTex = NULL;
}
static void
@@ -276,13 +276,14 @@ RenderCallback (ScrnInfoPtr pScrn)
{
RADEONInfoPtr info = RADEONPTR(pScrn);
- if ((currentTime.milliseconds > info->RenderTimeout) && info->RenderTex) {
- xf86FreeOffscreenLinear(info->RenderTex);
- info->RenderTex = NULL;
+ if ((currentTime.milliseconds > info->accel_state->RenderTimeout) &&
+ info->accel_state->RenderTex) {
+ xf86FreeOffscreenLinear(info->accel_state->RenderTex);
+ info->accel_state->RenderTex = NULL;
}
- if (!info->RenderTex)
- info->RenderCallback = NULL;
+ if (!info->accel_state->RenderTex)
+ info->accel_state->RenderCallback = NULL;
}
static Bool
@@ -293,30 +294,30 @@ AllocateLinear (
RADEONInfoPtr info = RADEONPTR(pScrn);
int cpp = info->CurrentLayout.bitsPerPixel / 8;
- info->RenderTimeout = currentTime.milliseconds + 30000;
- info->RenderCallback = RenderCallback;
+ info->accel_state->RenderTimeout = currentTime.milliseconds + 30000;
+ info->accel_state->RenderCallback = RenderCallback;
/* XAA allocates in units of pixels at the screen bpp, so adjust size
* appropriately.
*/
sizeNeeded = (sizeNeeded + cpp - 1) / cpp;
- if (info->RenderTex) {
- if (info->RenderTex->size >= sizeNeeded)
+ if (info->accel_state->RenderTex) {
+ if (info->accel_state->RenderTex->size >= sizeNeeded)
return TRUE;
else {
- if (xf86ResizeOffscreenLinear(info->RenderTex, sizeNeeded))
+ if (xf86ResizeOffscreenLinear(info->accel_state->RenderTex, sizeNeeded))
return TRUE;
- xf86FreeOffscreenLinear(info->RenderTex);
- info->RenderTex = NULL;
+ xf86FreeOffscreenLinear(info->accel_state->RenderTex);
+ info->accel_state->RenderTex = NULL;
}
}
- info->RenderTex = xf86AllocateOffscreenLinear(pScrn->pScreen, sizeNeeded, 32,
- NULL, RemoveLinear, info);
+ info->accel_state->RenderTex = xf86AllocateOffscreenLinear(pScrn->pScreen, sizeNeeded, 32,
+ NULL, RemoveLinear, info);
- return (info->RenderTex != NULL);
+ return (info->accel_state->RenderTex != NULL);
}
#if X_BYTE_ORDER == X_BIG_ENDIAN
@@ -435,7 +436,7 @@ static Bool FUNC_NAME(R100SetupTexture)(
txformat |= RADEON_TXFORMAT_NON_POWER2;
}
- offset = info->RenderTex->offset * pScrn->bitsPerPixel / 8;
+ offset = info->accel_state->RenderTex->offset * pScrn->bitsPerPixel / 8;
dst = (uint8_t*)(info->FB + offset);
/* Upload texture to card. */
@@ -459,8 +460,8 @@ static Bool FUNC_NAME(R100SetupTexture)(
#else
- if (info->accel->NeedToSync)
- info->accel->Sync(pScrn);
+ if (info->accel_state->accel->NeedToSync)
+ info->accel_state->accel->Sync(pScrn);
while (height--) {
memcpy(dst, src, width * tex_bytepp);
@@ -514,7 +515,7 @@ FUNC_NAME(R100SetupForCPUToScreenAlphaTexture) (
if (blend_cntl == 0)
return FALSE;
- if (!info->XInited3D)
+ if (!info->accel_state->XInited3D)
RADEONInit3DEngine(pScrn);
if (!FUNC_NAME(R100SetupTexture)(pScrn, maskFormat, alphaPtr, alphaPitch,
@@ -565,7 +566,7 @@ FUNC_NAME(R100SetupForCPUToScreenTexture) (
if (blend_cntl == 0)
return FALSE;
- if (!info->XInited3D)
+ if (!info->accel_state->XInited3D)
RADEONInit3DEngine(pScrn);
if (!FUNC_NAME(R100SetupTexture)(pScrn, srcFormat, texPtr, texPitch, width,
@@ -772,10 +773,10 @@ static Bool FUNC_NAME(R200SetupTexture)(
txformat |= RADEON_TXFORMAT_NON_POWER2;
}
- info->texW[0] = width;
- info->texH[0] = height;
+ info->accel_state->texW[0] = width;
+ info->accel_state->texH[0] = height;
- offset = info->RenderTex->offset * pScrn->bitsPerPixel / 8;
+ offset = info->accel_state->RenderTex->offset * pScrn->bitsPerPixel / 8;
dst = (uint8_t*)(info->FB + offset);
/* Upload texture to card. */
@@ -799,8 +800,8 @@ static Bool FUNC_NAME(R200SetupTexture)(
#else
- if (info->accel->NeedToSync)
- info->accel->Sync(pScrn);
+ if (info->accel_state->accel->NeedToSync)
+ info->accel_state->accel->Sync(pScrn);
while (height--) {
memcpy(dst, src, width * tex_bytepp);
@@ -855,7 +856,7 @@ FUNC_NAME(R200SetupForCPUToScreenAlphaTexture) (
if (blend_cntl == 0)
return FALSE;
- if (!info->XInited3D)
+ if (!info->accel_state->XInited3D)
RADEONInit3DEngine(pScrn);
if (!FUNC_NAME(R200SetupTexture)(pScrn, maskFormat, alphaPtr, alphaPitch,
@@ -907,7 +908,7 @@ FUNC_NAME(R200SetupForCPUToScreenTexture) (
if (blend_cntl == 0)
return FALSE;
- if (!info->XInited3D)
+ if (!info->accel_state->XInited3D)
RADEONInit3DEngine(pScrn);
if (!FUNC_NAME(R200SetupTexture)(pScrn, srcFormat, texPtr, texPitch, width,
@@ -974,10 +975,10 @@ FUNC_NAME(R200SubsequentCPUToScreenTexture) (
r = width + l;
b = height + t;
- fl = (float)srcx / info->texW[0];
- fr = (float)(srcx + width) / info->texW[0];
- ft = (float)srcy / info->texH[0];
- fb = (float)(srcy + height) / info->texH[0];
+ fl = (float)srcx / info->accel_state->texW[0];
+ fr = (float)(srcx + width) / info->accel_state->texW[0];
+ ft = (float)srcy / info->accel_state->texH[0];
+ fb = (float)(srcy + height) / info->accel_state->texH[0];
#ifdef ACCEL_CP
BEGIN_RING(24);
diff --git a/src/radeon_textured_videofuncs.c b/src/radeon_textured_videofuncs.c
index 09e28110..c5ad0e18 100644
--- a/src/radeon_textured_videofuncs.c
+++ b/src/radeon_textured_videofuncs.c
@@ -127,7 +127,7 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
dstyoff = 0;
#endif
- if (!info->XInited3D)
+ if (!info->accel_state->XInited3D)
RADEONInit3DEngine(pScrn);
/* we can probably improve this */
@@ -189,8 +189,8 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
(((pPriv->h - 1) & 0x7ff) << R300_TXHEIGHT_SHIFT) |
R300_TXPITCH_EN);
- info->texW[0] = pPriv->w;
- info->texH[0] = pPriv->h;
+ info->accel_state->texW[0] = pPriv->w;
+ info->accel_state->texH[0] = pPriv->h;
txfilter = (R300_TX_CLAMP_S(R300_TX_CLAMP_CLAMP_LAST) |
R300_TX_CLAMP_T(R300_TX_CLAMP_CLAMP_LAST) |
@@ -251,7 +251,7 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
}
/* setup the VAP */
- if (info->has_tcl) {
+ if (info->accel_state->has_tcl) {
if (pPriv->bicubic_enabled)
BEGIN_ACCEL(7);
else
@@ -312,7 +312,7 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
* - Xv
* Here we select the offset of the vertex program we want to use
*/
- if (info->has_tcl) {
+ if (info->accel_state->has_tcl) {
if (pPriv->bicubic_enabled) {
OUT_ACCEL_REG(R300_VAP_PVS_CODE_CNTL_0,
((0 << R300_PVS_FIRST_INST_SHIFT) |
@@ -1044,8 +1044,8 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
(info->ChipFamily == CHIP_FAMILY_RS300) ||
(info->ChipFamily == CHIP_FAMILY_R200)) {
- info->texW[0] = pPriv->w;
- info->texH[0] = pPriv->h;
+ info->accel_state->texW[0] = pPriv->w;
+ info->accel_state->texH[0] = pPriv->h;
BEGIN_ACCEL(12);
@@ -1085,8 +1085,8 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
FINISH_ACCEL();
} else {
- info->texW[0] = 1;
- info->texH[0] = 1;
+ info->accel_state->texW[0] = 1;
+ info->accel_state->texH[0] = 1;
BEGIN_ACCEL(8);
@@ -1199,28 +1199,28 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
#endif
if (pPriv->bicubic_enabled) {
VTX_OUT_FILTER((float)dstX, (float)dstY,
- xFixedToFloat(srcTopLeft.x) / info->texW[0], xFixedToFloat(srcTopLeft.y) / info->texH[0],
+ xFixedToFloat(srcTopLeft.x) / info->accel_state->texW[0], xFixedToFloat(srcTopLeft.y) / info->accel_state->texH[0],
xFixedToFloat(srcTopLeft.x) + 0.5, xFixedToFloat(srcTopLeft.y) + 0.5);
VTX_OUT_FILTER((float)dstX, (float)(dstY + dsth),
- xFixedToFloat(srcBottomLeft.x) / info->texW[0], xFixedToFloat(srcBottomLeft.y) / info->texH[0],
+ xFixedToFloat(srcBottomLeft.x) / info->accel_state->texW[0], xFixedToFloat(srcBottomLeft.y) / info->accel_state->texH[0],
xFixedToFloat(srcBottomLeft.x) + 0.5, xFixedToFloat(srcBottomLeft.y) + 0.5);
VTX_OUT_FILTER((float)(dstX + dstw), (float)(dstY + dsth),
- xFixedToFloat(srcBottomRight.x) / info->texW[0], xFixedToFloat(srcBottomRight.y) / info->texH[0],
+ xFixedToFloat(srcBottomRight.x) / info->accel_state->texW[0], xFixedToFloat(srcBottomRight.y) / info->accel_state->texH[0],
xFixedToFloat(srcBottomRight.x) + 0.5, xFixedToFloat(srcBottomRight.y) + 0.5);
VTX_OUT_FILTER((float)(dstX + dstw), (float)dstY,
- xFixedToFloat(srcTopRight.x) / info->texW[0], xFixedToFloat(srcTopRight.y) / info->texH[0],
+ xFixedToFloat(srcTopRight.x) / info->accel_state->texW[0], xFixedToFloat(srcTopRight.y) / info->accel_state->texH[0],
xFixedToFloat(srcTopRight.x) + 0.5, xFixedToFloat(srcTopRight.y) + 0.5);
} else {
if (info->ChipFamily >= CHIP_FAMILY_R200) {
VTX_OUT((float)dstX, (float)dstY,
- xFixedToFloat(srcTopLeft.x) / info->texW[0], xFixedToFloat(srcTopLeft.y) / info->texH[0]);
+ xFixedToFloat(srcTopLeft.x) / info->accel_state->texW[0], xFixedToFloat(srcTopLeft.y) / info->accel_state->texH[0]);
}
VTX_OUT((float)dstX, (float)(dstY + dsth),
- xFixedToFloat(srcBottomLeft.x) / info->texW[0], xFixedToFloat(srcBottomLeft.y) / info->texH[0]);
+ xFixedToFloat(srcBottomLeft.x) / info->accel_state->texW[0], xFixedToFloat(srcBottomLeft.y) / info->accel_state->texH[0]);
VTX_OUT((float)(dstX + dstw), (float)(dstY + dsth),
- xFixedToFloat(srcBottomRight.x) / info->texW[0], xFixedToFloat(srcBottomRight.y) / info->texH[0]);
+ xFixedToFloat(srcBottomRight.x) / info->accel_state->texW[0], xFixedToFloat(srcBottomRight.y) / info->accel_state->texH[0]);
VTX_OUT((float)(dstX + dstw), (float)dstY,
- xFixedToFloat(srcTopRight.x) / info->texW[0], xFixedToFloat(srcTopRight.y) / info->texH[0]);
+ xFixedToFloat(srcTopRight.x) / info->accel_state->texW[0], xFixedToFloat(srcTopRight.y) / info->accel_state->texH[0]);
}
if (IS_R300_3D || IS_R500_3D)
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-22 21:56:39 +0000