rv770 initial support

adds pci ids and one register from AMD code

9 files changed, 31 insertions, 2 deletions

diff --git a/src/ati_pciids_gen.h b/src/ati_pciids_gen.h
index 2c3494db..0fb8be52 100644
--- a/src/ati_pciids_gen.h
+++ b/src/ati_pciids_gen.h
@@ -331,6 +331,8 @@
 #define PCI_CHIP_R600_940A 0x940A
 #define PCI_CHIP_R600_940B 0x940B
 #define PCI_CHIP_R600_940F 0x940F
+#define PCI_CHIP_RV770_9440 0x9440
+#define PCI_CHIP_RV770_9442 0x9442
 #define PCI_CHIP_RV610_94C0 0x94C0
 #define PCI_CHIP_RV610_94C1 0x94C1
 #define PCI_CHIP_RV610_94C3 0x94C3
diff --git a/src/pcidb/ati_pciids.csv b/src/pcidb/ati_pciids.csv
index 49efeca4..e7775387 100644
--- a/src/pcidb/ati_pciids.csv
+++ b/src/pcidb/ati_pciids.csv
@@ -332,6 +332,8 @@
 "0x940A","R600_940A","R600",,,,,,"ATI FireGL V8650"
 "0x940B","R600_940B","R600",,,,,,"ATI FireGL V8600"
 "0x940F","R600_940F","R600",,,,,,"ATI FireGL V7600"
+"0x9440","RV770_9440","RV770",,,,,,"ATI Radeon 4800 Series"
+"0x9442","RV770_9442","RV770",,,,,,"ATI Radeon 4800 Series"
 "0x94C0","RV610_94C0","RV610",,,,,,"ATI RV610"
 "0x94C1","RV610_94C1","RV610",,,,,,"ATI Radeon HD 2400 XT"
 "0x94C3","RV610_94C3","RV610",,,,,,"ATI Radeon HD 2400 Pro"
diff --git a/src/radeon.h b/src/radeon.h
index 23bd0a52..6f7fadef 100644
--- a/src/radeon.h
+++ b/src/radeon.h
@@ -287,6 +287,7 @@ typedef enum {
     CHIP_FAMILY_RV620,
     CHIP_FAMILY_RV635,
     CHIP_FAMILY_RS780,
+    CHIP_FAMILY_RV770,
     CHIP_FAMILY_LAST
 } RADEONChipFamily;
 
diff --git a/src/radeon_chipinfo_gen.h b/src/radeon_chipinfo_gen.h
index 3fcd78df..d3b6e8a8 100644
--- a/src/radeon_chipinfo_gen.h
+++ b/src/radeon_chipinfo_gen.h
@@ -251,6 +251,8 @@ RADEONCardInfo RADEONCards[] = {
  { 0x940A, CHIP_FAMILY_R600, 0, 0, 0, 0, 0 },
  { 0x940B, CHIP_FAMILY_R600, 0, 0, 0, 0, 0 },
  { 0x940F, CHIP_FAMILY_R600, 0, 0, 0, 0, 0 },
+ { 0x9440, CHIP_FAMILY_RV770, 0, 0, 0, 0, 0 },
+ { 0x9442, CHIP_FAMILY_RV770, 0, 0, 0, 0, 0 },
  { 0x94C0, CHIP_FAMILY_RV610, 0, 0, 0, 0, 0 },
  { 0x94C1, CHIP_FAMILY_RV610, 0, 0, 0, 0, 0 },
  { 0x94C3, CHIP_FAMILY_RV610, 0, 0, 0, 0, 0 },
diff --git a/src/radeon_chipset_gen.h b/src/radeon_chipset_gen.h
index 9d309bb4..0b5da5dc 100644
--- a/src/radeon_chipset_gen.h
+++ b/src/radeon_chipset_gen.h
@@ -251,6 +251,8 @@ static SymTabRec RADEONChipsets[] = {
   { PCI_CHIP_R600_940A, "ATI FireGL V8650" },
   { PCI_CHIP_R600_940B, "ATI FireGL V8600" },
   { PCI_CHIP_R600_940F, "ATI FireGL V7600" },
+  { PCI_CHIP_RV770_9440, "ATI Radeon 4800 Series" },
+  { PCI_CHIP_RV770_9442, "ATI Radeon 4800 Series" },
   { PCI_CHIP_RV610_94C0, "ATI RV610" },
   { PCI_CHIP_RV610_94C1, "ATI Radeon HD 2400 XT" },
   { PCI_CHIP_RV610_94C3, "ATI Radeon HD 2400 Pro" },
diff --git a/src/radeon_driver.c b/src/radeon_driver.c
index a4814913..f66e6637 100644
--- a/src/radeon_driver.c
+++ b/src/radeon_driver.c
@@ -669,7 +669,14 @@ static void radeon_write_mc_fb_agp_location(ScrnInfoPtr pScrn, int mask, uint32_
     RADEONInfoPtr  info       = RADEONPTR(pScrn);
     unsigned char *RADEONMMIO = info->MMIO;
 
-    if (info->ChipFamily >= CHIP_FAMILY_R600) {
+    if (info->ChipFamily >= CHIP_FAMILY_RV770) {
+	if (mask & LOC_FB)
+	    OUTREG(R700_MC_VM_FB_LOCATION, fb_loc);
+	if (mask & LOC_AGP) {
+	    OUTREG(R600_MC_VM_AGP_BOT, agp_loc);
+	    OUTREG(R600_MC_VM_AGP_TOP, agp_loc_hi);
+	}
+    } else if (info->ChipFamily >= CHIP_FAMILY_R600) {
 	if (mask & LOC_FB)
 	    OUTREG(R600_MC_VM_FB_LOCATION, fb_loc);
 	if (mask & LOC_AGP) {
@@ -712,7 +719,14 @@ static void radeon_read_mc_fb_agp_location(ScrnInfoPtr pScrn, int mask, uint32_t
     RADEONInfoPtr  info       = RADEONPTR(pScrn);
     unsigned char *RADEONMMIO = info->MMIO;
 
-    if (info->ChipFamily >= CHIP_FAMILY_R600) {
+    if (info->ChipFamily >= CHIP_FAMILY_RV770) {
+	if (mask & LOC_FB)
+	    *fb_loc = INREG(R700_MC_VM_FB_LOCATION);
+	if (mask & LOC_AGP) {
+	    *agp_loc = INREG(R600_MC_VM_AGP_BOT);
+	    *agp_loc_hi = INREG(R600_MC_VM_AGP_TOP);
+	}
+    } else if (info->ChipFamily >= CHIP_FAMILY_R600) {
 	if (mask & LOC_FB)
 	    *fb_loc = INREG(R600_MC_VM_FB_LOCATION);
 	if (mask & LOC_AGP) {
diff --git a/src/radeon_pci_chipset_gen.h b/src/radeon_pci_chipset_gen.h
index 1b79451c..b9ca6b95 100644
--- a/src/radeon_pci_chipset_gen.h
+++ b/src/radeon_pci_chipset_gen.h
@@ -251,6 +251,8 @@ PciChipsets RADEONPciChipsets[] = {
  { PCI_CHIP_R600_940A, PCI_CHIP_R600_940A, RES_SHARED_VGA },
  { PCI_CHIP_R600_940B, PCI_CHIP_R600_940B, RES_SHARED_VGA },
  { PCI_CHIP_R600_940F, PCI_CHIP_R600_940F, RES_SHARED_VGA },
+ { PCI_CHIP_RV770_9440, PCI_CHIP_RV770_9440, RES_SHARED_VGA },
+ { PCI_CHIP_RV770_9442, PCI_CHIP_RV770_9442, RES_SHARED_VGA },
  { PCI_CHIP_RV610_94C0, PCI_CHIP_RV610_94C0, RES_SHARED_VGA },
  { PCI_CHIP_RV610_94C1, PCI_CHIP_RV610_94C1, RES_SHARED_VGA },
  { PCI_CHIP_RV610_94C3, PCI_CHIP_RV610_94C3, RES_SHARED_VGA },
diff --git a/src/radeon_pci_device_match_gen.h b/src/radeon_pci_device_match_gen.h
index 48edff9b..73e97431 100644
--- a/src/radeon_pci_device_match_gen.h
+++ b/src/radeon_pci_device_match_gen.h
@@ -251,6 +251,8 @@ static const struct pci_id_match radeon_device_match[] = {
  ATI_DEVICE_MATCH( PCI_CHIP_R600_940A, 0 ),
  ATI_DEVICE_MATCH( PCI_CHIP_R600_940B, 0 ),
  ATI_DEVICE_MATCH( PCI_CHIP_R600_940F, 0 ),
+ ATI_DEVICE_MATCH( PCI_CHIP_RV770_9440, 0 ),
+ ATI_DEVICE_MATCH( PCI_CHIP_RV770_9442, 0 ),
  ATI_DEVICE_MATCH( PCI_CHIP_RV610_94C0, 0 ),
  ATI_DEVICE_MATCH( PCI_CHIP_RV610_94C1, 0 ),
  ATI_DEVICE_MATCH( PCI_CHIP_RV610_94C3, 0 ),
diff --git a/src/radeon_reg.h b/src/radeon_reg.h
index 59e2f123..3db1dbb2 100644
--- a/src/radeon_reg.h
+++ b/src/radeon_reg.h
@@ -3918,6 +3918,8 @@
 #define R600_MC_VM_SYSTEM_APERTURE_HIGH_ADDR                       0x2194
 #define R600_MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR                    0x2198
 
+#define R700_MC_VM_FB_LOCATION                                     0x2024
+
 #define R600_HDP_NONSURFACE_BASE                                0x2c04
 
 #define R600_BUS_CNTL                                           0x5420