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authorAlex Deucher <alexdeucher@gmail.com>2009-03-13 14:03:43 -0400
committerAlex Deucher <alexdeucher@gmail.com>2009-03-13 17:58:06 -0400
commit8c2d40894448329e721360811c124998a17ba2ba (patch)
tree1878d766b0077edfd70922d83469eea1e13a6159
parent176c1b43fc3ee48e87c134446754360b3683c24b (diff)
R6xx/R7xx: fix up vline stuff along the lines of previous chips
Avoids an additional function call.
-rw-r--r--src/r600_state.h2
-rw-r--r--src/r600_textured_videofuncs.c20
-rw-r--r--src/r6xx_accel.c5
3 files changed, 12 insertions, 15 deletions
diff --git a/src/r600_state.h b/src/r600_state.h
index 6621420b..c903ded7 100644
--- a/src/r600_state.h
+++ b/src/r600_state.h
@@ -245,7 +245,7 @@ set_render_target(ScrnInfoPtr pScrn, drmBufPtr ib, cb_config_t *cb_conf);
void
cp_set_surface_sync(ScrnInfoPtr pScrn, drmBufPtr ib, uint32_t sync_type, uint32_t size, uint64_t mc_addr);
void
-cp_wait_vline_sync(ScrnInfoPtr pScrn, drmBufPtr ib, PixmapPtr pPix, int crtc, int start, int stop, Bool enable);
+cp_wait_vline_sync(ScrnInfoPtr pScrn, drmBufPtr ib, PixmapPtr pPix, int crtc, int start, int stop);
void
fs_setup(ScrnInfoPtr pScrn, drmBufPtr ib, shader_config_t *fs_conf);
void
diff --git a/src/r600_textured_videofuncs.c b/src/r600_textured_videofuncs.c
index 56adc6d5..735231b5 100644
--- a/src/r600_textured_videofuncs.c
+++ b/src/r600_textured_videofuncs.c
@@ -446,16 +446,16 @@ R600DisplayTexturedVideo(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv)
EREG(accel_state->ib, SPI_INTERP_CONTROL_0, 0);
- cp_wait_vline_sync(pScrn, accel_state->ib, pPixmap,
- radeon_covering_crtc_num(pScrn,
- pPriv->drw_x,
- pPriv->drw_x + pPriv->dst_w,
- pPriv->drw_y,
- pPriv->drw_y + pPriv->dst_h,
- pPriv->desired_crtc),
- pPriv->drw_y,
- pPriv->drw_y + pPriv->dst_h,
- pPriv->vsync);
+ if (pPriv->vsync)
+ cp_wait_vline_sync(pScrn, accel_state->ib, pPixmap,
+ radeon_covering_crtc_num(pScrn,
+ pPriv->drw_x,
+ pPriv->drw_x + pPriv->dst_w,
+ pPriv->drw_y,
+ pPriv->drw_y + pPriv->dst_h,
+ pPriv->desired_crtc),
+ pPriv->drw_y,
+ pPriv->drw_y + pPriv->dst_h);
accel_state->vb_index = 0;
diff --git a/src/r6xx_accel.c b/src/r6xx_accel.c
index 114ccf50..f93ca013 100644
--- a/src/r6xx_accel.c
+++ b/src/r6xx_accel.c
@@ -309,16 +309,13 @@ cp_set_surface_sync(ScrnInfoPtr pScrn, drmBufPtr ib, uint32_t sync_type, uint32_
/* inserts a wait for vline in the command stream */
void cp_wait_vline_sync(ScrnInfoPtr pScrn, drmBufPtr ib, PixmapPtr pPix,
- int crtc, int start, int stop, Bool enable)
+ int crtc, int start, int stop)
{
RADEONInfoPtr info = RADEONPTR(pScrn);
xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
uint32_t offset;
RADEONCrtcPrivatePtr radeon_crtc;
- if (!enable)
- return;
-
if ((crtc < 0) || (crtc > 1))
return;