diff options
| author | Alex Deucher <alex@cube.(none)> | 2008-03-07 15:09:14 -0500 |
|---|---|---|
| committer | Alex Deucher <alex@cube.(none)> | 2008-03-07 15:09:14 -0500 |
| commit | 9d710ee1a44cf2f3a948fbdbe17ef09521cbe744 (patch) | |
| tree | 0154f631f0f6961f9f2a880d889aac5349342665 | |
| parent | c28c30c9f3d7bfebfd56a5c982c96f0090982054 (diff) | |
AVIVO: clean up some unused variables
| -rw-r--r-- | src/atombios_crtc.c | 17 | ||||
| -rw-r--r-- | src/radeon_probe.h | 7 |
2 files changed, 7 insertions, 17 deletions
diff --git a/src/atombios_crtc.c b/src/atombios_crtc.c index ad7fd54e..7c628bfb 100644 --- a/src/atombios_crtc.c +++ b/src/atombios_crtc.c @@ -401,27 +401,25 @@ atombios_crtc_mode_set(xf86CrtcPtr crtc, adjusted_mode->CrtcHTotal, adjusted_mode->CrtcVTotal, adjusted_mode->Flags); if (IS_AVIVO_VARIANT) { - radeon_crtc->fb_width = mode->CrtcHDisplay; - radeon_crtc->fb_height = pScrn->virtualY; - radeon_crtc->fb_pitch = mode->CrtcHDisplay; - radeon_crtc->fb_length = radeon_crtc->fb_pitch * radeon_crtc->fb_height * 4; + CARD32 fb_format; + switch (crtc->scrn->bitsPerPixel) { case 15: - radeon_crtc->fb_format = AVIVO_D1GRPH_CONTROL_DEPTH_16BPP | AVIVO_D1GRPH_CONTROL_16BPP_ARGB1555; + fb_format = AVIVO_D1GRPH_CONTROL_DEPTH_16BPP | AVIVO_D1GRPH_CONTROL_16BPP_ARGB1555; break; case 16: - radeon_crtc->fb_format = AVIVO_D1GRPH_CONTROL_DEPTH_16BPP | AVIVO_D1GRPH_CONTROL_16BPP_RGB565; + fb_format = AVIVO_D1GRPH_CONTROL_DEPTH_16BPP | AVIVO_D1GRPH_CONTROL_16BPP_RGB565; break; case 24: case 32: - radeon_crtc->fb_format = AVIVO_D1GRPH_CONTROL_DEPTH_32BPP | AVIVO_D1GRPH_CONTROL_32BPP_ARGB8888; + fb_format = AVIVO_D1GRPH_CONTROL_DEPTH_32BPP | AVIVO_D1GRPH_CONTROL_32BPP_ARGB8888; break; default: FatalError("Unsupported screen depth: %d\n", xf86GetDepth()); } if (info->tilingEnabled && (crtc->rotatedData == NULL)) { - radeon_crtc->fb_format |= AVIVO_D1GRPH_MACRO_ADDRESS_MODE; + fb_format |= AVIVO_D1GRPH_MACRO_ADDRESS_MODE; } if (radeon_crtc->crtc_id == 0) @@ -443,8 +441,7 @@ atombios_crtc_mode_set(xf86CrtcPtr crtc, OUTREG(AVIVO_D1GRPH_PRIMARY_SURFACE_ADDRESS + radeon_crtc->crtc_offset, fb_location); OUTREG(AVIVO_D1GRPH_SECONDARY_SURFACE_ADDRESS + radeon_crtc->crtc_offset, fb_location); - OUTREG(AVIVO_D1GRPH_CONTROL + radeon_crtc->crtc_offset, - radeon_crtc->fb_format); + OUTREG(AVIVO_D1GRPH_CONTROL + radeon_crtc->crtc_offset, fb_format); OUTREG(AVIVO_D1GRPH_SURFACE_OFFSET_X + radeon_crtc->crtc_offset, 0); OUTREG(AVIVO_D1GRPH_SURFACE_OFFSET_Y + radeon_crtc->crtc_offset, 0); diff --git a/src/radeon_probe.h b/src/radeon_probe.h index 4ba6a32d..ae24003c 100644 --- a/src/radeon_probe.h +++ b/src/radeon_probe.h @@ -191,13 +191,6 @@ typedef struct _RADEONCrtcPrivateRec { CARD8 lut_r[256], lut_g[256], lut_b[256]; uint32_t crtc_offset; - int h_total, h_blank, h_sync_wid, h_sync_pol; - int v_total, v_blank, v_sync_wid, v_sync_pol; - int fb_format, fb_length; - int fb_pitch, fb_width, fb_height; - INT16 cursor_x; - INT16 cursor_y; - int can_tile; } RADEONCrtcPrivateRec, *RADEONCrtcPrivatePtr; |