diff options
| author | Alex Deucher <alex@botch2.(none)> | 2007-09-18 22:23:12 -0400 |
|---|---|---|
| committer | Alex Deucher <alex@botch2.(none)> | 2007-09-18 22:23:12 -0400 |
| commit | dc333884c540d536bffe51a5ebfaf1822af6a91c (patch) | |
| tree | eff6a8b3eaa764f9fca135c6f367647f50c31fcc | |
| parent | 271e541088f455d1cfedff87e88c9a4fdbdbe424 (diff) | |
RADEON: fix plls again
previous fix seemed to break other chips. Lets see how
this goes.
| -rw-r--r-- | src/radeon_crtc.c | 1 | ||||
| -rw-r--r-- | src/radeon_driver.c | 10 |
2 files changed, 8 insertions, 3 deletions
diff --git a/src/radeon_crtc.c b/src/radeon_crtc.c index 042d14bf..47e46f38 100644 --- a/src/radeon_crtc.c +++ b/src/radeon_crtc.c @@ -862,7 +862,6 @@ radeon_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode, case 1: RADEONAdjustCrtc2RegistersForTV(pScrn, &info->ModeReg, adjusted_mode, output); RADEONAdjustPLL2RegistersForTV(pScrn, &info->ModeReg, adjusted_mode, output); - update_tv_routing = TRUE; break; } } diff --git a/src/radeon_driver.c b/src/radeon_driver.c index eb2d5795..5c374884 100644 --- a/src/radeon_driver.c +++ b/src/radeon_driver.c @@ -4661,7 +4661,10 @@ void RADEONRestorePLLRegisters(ScrnInfoPtr pScrn, OUTPLLP(pScrn, RADEON_VCLK_ECP_CNTL, RADEON_VCLK_SRC_SEL_PPLLCLK, ~(RADEON_VCLK_SRC_SEL_MASK)); - /*OUTPLL(pScrn, RADEON_VCLK_ECP_CNTL, restore->vclk_ecp_cntl);*/ + + usleep(50000); + + OUTPLL(pScrn, RADEON_VCLK_ECP_CNTL, restore->vclk_ecp_cntl); ErrorF("finished PLL1\n"); @@ -4735,7 +4738,10 @@ void RADEONRestorePLL2Registers(ScrnInfoPtr pScrn, OUTPLLP(pScrn, RADEON_PIXCLKS_CNTL, RADEON_PIX2CLK_SRC_SEL_P2PLLCLK, ~(RADEON_PIX2CLK_SRC_SEL_MASK)); - /*OUTPLL(pScrn, RADEON_PIXCLKS_CNTL, restore->pixclks_cntl);*/ + + usleep(5000); + + OUTPLL(pScrn, RADEON_PIXCLKS_CNTL, restore->pixclks_cntl); ErrorF("finished PLL2\n"); |