diff options
author | Alex Deucher <alex@t41p.hsd1.va.comcast.net> | 2008-04-01 09:25:45 -0400 |
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committer | Alex Deucher <alex@t41p.hsd1.va.comcast.net> | 2008-04-01 09:25:45 -0400 |
commit | fc9af578997b6f22ee8b17e83f37d98689291b0e (patch) | |
tree | daa41dd663524eb97f9b1897963cdea10bde3876 | |
parent | 959509dd54de053f526b534e379a46934127231f (diff) |
Revert "atombios: fixup the width/height to use the mode values not the scrn ones"
This reverts commit c2b1c8b706a6c7c1fd0af80091958473133d54e7.
These registers hold surface size. Using the mode values
breaks dualhead.
-rw-r--r-- | src/atombios_crtc.c | 18 |
1 files changed, 14 insertions, 4 deletions
diff --git a/src/atombios_crtc.c b/src/atombios_crtc.c index 229ca75e..e021bf97 100644 --- a/src/atombios_crtc.c +++ b/src/atombios_crtc.c @@ -450,8 +450,13 @@ atombios_crtc_mode_set(xf86CrtcPtr crtc, OUTREG(AVIVO_D1GRPH_SURFACE_OFFSET_Y + radeon_crtc->crtc_offset, 0); OUTREG(AVIVO_D1GRPH_X_START + radeon_crtc->crtc_offset, 0); OUTREG(AVIVO_D1GRPH_Y_START + radeon_crtc->crtc_offset, 0); - OUTREG(AVIVO_D1GRPH_X_END + radeon_crtc->crtc_offset, mode->HDisplay); - OUTREG(AVIVO_D1GRPH_Y_END + radeon_crtc->crtc_offset, mode->VDisplay); + if ((crtc->rotation == RR_Rotate_90) || (crtc->rotation == RR_Rotate_270)) { + OUTREG(AVIVO_D1GRPH_X_END + radeon_crtc->crtc_offset, crtc->scrn->virtualY); + OUTREG(AVIVO_D1GRPH_Y_END + radeon_crtc->crtc_offset, crtc->scrn->virtualX); + } else { + OUTREG(AVIVO_D1GRPH_X_END + radeon_crtc->crtc_offset, crtc->scrn->virtualX); + OUTREG(AVIVO_D1GRPH_Y_END + radeon_crtc->crtc_offset, crtc->scrn->virtualY); + } OUTREG(AVIVO_D1GRPH_PITCH + radeon_crtc->crtc_offset, crtc->scrn->displayWidth); OUTREG(AVIVO_D1GRPH_ENABLE + radeon_crtc->crtc_offset, 1); @@ -462,14 +467,19 @@ atombios_crtc_mode_set(xf86CrtcPtr crtc, /* lock the mode regs */ OUTREG(AVIVO_D1SCL_UPDATE + radeon_crtc->crtc_offset, AVIVO_D1SCL_UPDATE_LOCK); - OUTREG(AVIVO_D1MODE_DESKTOP_HEIGHT + radeon_crtc->crtc_offset, - mode->VDisplay); + if ((crtc->rotation == RR_Rotate_90) || (crtc->rotation == RR_Rotate_270)) + OUTREG(AVIVO_D1MODE_DESKTOP_HEIGHT + radeon_crtc->crtc_offset, + crtc->scrn->virtualX); + else + OUTREG(AVIVO_D1MODE_DESKTOP_HEIGHT + radeon_crtc->crtc_offset, + crtc->scrn->virtualY); OUTREG(AVIVO_D1MODE_VIEWPORT_START + radeon_crtc->crtc_offset, (x << 16) | y); OUTREG(AVIVO_D1MODE_VIEWPORT_SIZE + radeon_crtc->crtc_offset, (mode->HDisplay << 16) | mode->VDisplay); /* unlock the mode regs */ OUTREG(AVIVO_D1SCL_UPDATE + radeon_crtc->crtc_offset, 0); + ErrorF("scrn virtual X %d Y %d pitch %d\n", crtc->scrn->virtualX, crtc->scrn->virtualY, crtc->scrn->displayWidth); } atombios_crtc_set_pll(crtc, adjusted_mode); |