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authorMichel Dänzer <michel.daenzer@amd.com>2011-09-20 12:34:05 +0200
committerMichel Dänzer <michel@daenzer.net>2011-09-20 12:34:53 +0200
commitfcf0cca9c0ab0f692b222f619aee8f1cdad3b519 (patch)
tree69a639477c1b5b913581329d623601a1a04d0e1c
parentc96e6fb8a5f5be2319fdb4c431c1ba5279997fe8 (diff)
KMS Color Tiling requires xserver which supports EXA_MIXED_PIXMAPS.
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
-rw-r--r--src/radeon_kms.c12
1 files changed, 10 insertions, 2 deletions
diff --git a/src/radeon_kms.c b/src/radeon_kms.c
index e163e994..ccf11524 100644
--- a/src/radeon_kms.c
+++ b/src/radeon_kms.c
@@ -480,6 +480,8 @@ static Bool radeon_open_drm_master(ScrnInfoPtr pScrn)
return TRUE;
}
+#ifdef EXA_MIXED_PIXMAPS
+
static Bool r600_get_tile_config(ScrnInfoPtr pScrn)
{
RADEONInfoPtr info = RADEONPTR(pScrn);
@@ -591,13 +593,14 @@ static Bool r600_get_tile_config(ScrnInfoPtr pScrn)
return TRUE;
}
+#endif /* EXA_MIXED_PIXMAPS */
+
Bool RADEONPreInit_KMS(ScrnInfoPtr pScrn, int flags)
{
RADEONInfoPtr info;
RADEONEntPtr pRADEONEnt;
DevUnion* pPriv;
Gamma zeros = { 0.0, 0.0, 0.0 };
- Bool colorTilingDefault;
uint32_t tiling = 0;
int cpp;
@@ -671,9 +674,10 @@ Bool RADEONPreInit_KMS(ScrnInfoPtr pScrn, int flags)
if (!RADEONPreInitAccel_KMS(pScrn)) goto fail;
+#ifdef EXA_MIXED_PIXMAPS
/* don't enable tiling if accel is not enabled */
if (!info->r600_shadow_fb) {
- colorTilingDefault = info->ChipFamily >= CHIP_FAMILY_R300 &&
+ Bool colorTilingDefault = info->ChipFamily >= CHIP_FAMILY_R300 &&
info->ChipFamily <= CHIP_FAMILY_CAYMAN;
if (info->ChipFamily >= CHIP_FAMILY_R600) {
@@ -697,6 +701,10 @@ Bool RADEONPreInit_KMS(ScrnInfoPtr pScrn, int flags)
info->allowColorTiling = xf86ReturnOptValBool(info->Options,
OPTION_COLOR_TILING, colorTilingDefault);
} else
+#else
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "KMS Color Tiling requires xserver which supports EXA_MIXED_PIXMAPS\n");
+#endif
info->allowColorTiling = FALSE;
xf86DrvMsg(pScrn->scrnIndex, X_INFO,