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authorKristian Høgsberg <krh@bitplanet.net>2008-01-09 12:47:39 -0500
committerAlex Deucher <alex@botch2.(none)>2008-01-09 12:47:39 -0500
commit10e7636c02478b8ffe183bb0c46229ca0d6584e1 (patch)
treecae36706bba7b0b4fb36c12d0abdc728405a7e4f
parent3af671f5963810dbfd63abc9889b1d46b68f404c (diff)
RADEON: fix crtc routing on r4xx cards when using atom to init DVO chip
-rw-r--r--src/legacy_output.c19
1 files changed, 16 insertions, 3 deletions
diff --git a/src/legacy_output.c b/src/legacy_output.c
index 595b2436..45706b91 100644
--- a/src/legacy_output.c
+++ b/src/legacy_output.c
@@ -1230,11 +1230,24 @@ legacy_output_mode_set(xf86OutputPtr output, DisplayModePtr mode,
RADEONRestoreFPRegisters(pScrn, info->ModeReg);
} else {
ErrorF("restore FP2\n");
- RADEONRestoreFP2Registers(pScrn, info->ModeReg);
- if (info->IsAtomBios)
+ if (info->IsAtomBios) {
+ unsigned char *RADEONMMIO = info->MMIO;
+ CARD32 fp2_gen_cntl;
+
atombios_external_tmds_setup(output, mode);
- else
+ /* r4xx atom seems to have hard coded crtc mappings in the atom code
+ * Fix it up here.
+ */
+ fp2_gen_cntl = INREG(RADEON_FP2_GEN_CNTL) & ~R200_FP2_SOURCE_SEL_MASK;
+ if (radeon_crtc->crtc_id == 1)
+ fp2_gen_cntl |= R200_FP2_SOURCE_SEL_CRTC2;
+ else
+ fp2_gen_cntl |= R200_FP2_SOURCE_SEL_CRTC1;
+ OUTREG(RADEON_FP2_GEN_CNTL, fp2_gen_cntl);
+ } else {
RADEONRestoreDVOChip(pScrn, output);
+ RADEONRestoreFP2Registers(pScrn, info->ModeReg);
+ }
}
break;
case MT_STV: