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authorAlex Deucher <alexdeucher@gmail.com>2009-04-21 01:02:34 -0400
committerAlex Deucher <alexdeucher@gmail.com>2009-04-21 01:02:34 -0400
commit228b9ac87668241b09980fca17e9d866891285e6 (patch)
tree2a3c19e80bcb32a077bf8731aa3c9ff9cebe0983
parentb6febf7368d3df3f1d3fee6a87aa71c54e77cdcc (diff)
radeon PM: add some quirks
-rw-r--r--src/radeon_pm.c40
-rw-r--r--src/radeon_reg.h7
2 files changed, 38 insertions, 9 deletions
diff --git a/src/radeon_pm.c b/src/radeon_pm.c
index bf8fecfc..fb0b2807 100644
--- a/src/radeon_pm.c
+++ b/src/radeon_pm.c
@@ -521,14 +521,37 @@ static void LegacySetClockGating(ScrnInfoPtr pScrn, Bool enable)
}
}
-void RADEONForceSomeClocks(ScrnInfoPtr pScrn)
+static void RADEONPMQuirks(ScrnInfoPtr pScrn)
{
- /* It appears from r300 and rv100 may need some clocks forced-on */
- uint32_t tmp;
+ RADEONInfoPtr info = RADEONPTR(pScrn);
+ uint32_t tmp;
+
+ RADEONWaitForIdleMMIO(pScrn);
- tmp = INPLL(pScrn, RADEON_SCLK_CNTL);
- tmp |= RADEON_SCLK_FORCE_CP | RADEON_SCLK_FORCE_VIP;
- OUTPLL(pScrn, RADEON_SCLK_CNTL, tmp);
+ if (info->ChipFamily < CHIP_FAMILY_RV515) {
+ tmp = INPLL(pScrn, RADEON_SCLK_CNTL);
+ if (IS_R300_VARIANT || IS_RV100_VARIANT)
+ tmp |= RADEON_SCLK_FORCE_CP | RADEON_SCLK_FORCE_VIP;
+ if ((info->ChipFamily == CHIP_FAMILY_RV250) || (info->ChipFamily == CHIP_FAMILY_RV280))
+ tmp |= RADEON_SCLK_FORCE_DISP1 | RADEON_SCLK_FORCE_DISP2;
+ if ((info->ChipFamily == CHIP_FAMILY_RV350) || (info->ChipFamily == CHIP_FAMILY_RV380))
+ tmp |= R300_SCLK_FORCE_VAP;
+ if (info->ChipFamily == CHIP_FAMILY_R420)
+ tmp |= R300_SCLK_FORCE_PX | R300_SCLK_FORCE_TX;
+ OUTPLL(pScrn, RADEON_SCLK_CNTL, tmp);
+ } else if (info->ChipFamily == CHIP_FAMILY_RV530) {
+ tmp = INPLL(pScrn, AVIVO_CP_DYN_CNTL);
+ tmp |= AVIVO_CP_FORCEON;
+ OUTPLL(pScrn, AVIVO_CP_DYN_CNTL, tmp);
+
+ tmp = INPLL(pScrn, AVIVO_E2_DYN_CNTL);
+ tmp |= AVIVO_E2_FORCEON;
+ OUTPLL(pScrn, AVIVO_E2_DYN_CNTL, tmp);
+
+ tmp = INPLL(pScrn, AVIVO_IDCT_DYN_CNTL);
+ tmp |= AVIVO_IDCT_FORCEON;
+ OUTPLL(pScrn, AVIVO_IDCT_DYN_CNTL, tmp);
+ }
}
static void
@@ -645,9 +668,6 @@ RADEONSetClockGating(ScrnInfoPtr pScrn, Bool enable)
atombios_clk_gating_setup(pScrn, enable);
} else if (info->IsMobility)
LegacySetClockGating(pScrn, enable);
-
- if (IS_R300_VARIANT || IS_RV100_VARIANT)
- RADEONForceSomeClocks(pScrn);
}
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Dynamic Clock Gating %sabled\n",
@@ -742,6 +762,7 @@ void RADEONPMInit(ScrnInfoPtr pScrn)
} else
info->pm.force_low_power_enabled = FALSE;
+ RADEONPMQuirks(pScrn);
}
void RADEONPMEnterVT(ScrnInfoPtr pScrn)
@@ -750,6 +771,7 @@ void RADEONPMEnterVT(ScrnInfoPtr pScrn)
if (info->pm.clock_gating_enabled)
RADEONSetClockGating(pScrn, info->pm.clock_gating_enabled);
+ RADEONPMQuirks(pScrn);
if (info->pm.force_low_power_enabled || info->pm.dynamic_mode_enabled)
RADEONSetStaticPowerMode(pScrn, POWER_HIGH);
}
diff --git a/src/radeon_reg.h b/src/radeon_reg.h
index e085353e..1cc7640f 100644
--- a/src/radeon_reg.h
+++ b/src/radeon_reg.h
@@ -3540,6 +3540,13 @@
#define R600_SRBM_STATUS 0x0e50
+#define AVIVO_CP_DYN_CNTL 0x000f /* PLL */
+# define AVIVO_CP_FORCEON (1 << 0)
+#define AVIVO_E2_DYN_CNTL 0x0011 /* PLL */
+# define AVIVO_E2_FORCEON (1 << 0)
+#define AVIVO_IDCT_DYN_CNTL 0x0013 /* PLL */
+# define AVIVO_IDCT_FORCEON (1 << 0)
+
#define AVIVO_HDP_FB_LOCATION 0x134
#define AVIVO_VGA_RENDER_CONTROL 0x0300