diff options
author | Dave Airlie <airlied@redhat.com> | 2008-12-16 12:19:00 +1000 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2008-12-16 12:19:00 +1000 |
commit | 4d2429f3ec4d7d3e1512b268c7ff5cbff8d186b4 (patch) | |
tree | 765d2f85b4768ee366f758ecebcab27d165988fc | |
parent | 4d3792fd1b9f733107582436540f483d8993199f (diff) |
DCE32: add support for DCE3.2 digital outputs.
This adds support for the digital outputs on the RV730.
-rw-r--r-- | src/atombios_output.c | 275 | ||||
-rw-r--r-- | src/radeon.h | 3 | ||||
-rw-r--r-- | src/radeon_atombios.c | 20 | ||||
-rw-r--r-- | src/radeon_probe.h | 4 |
4 files changed, 216 insertions, 86 deletions
diff --git a/src/atombios_output.c b/src/atombios_output.c index 34796f85..396af31d 100644 --- a/src/atombios_output.c +++ b/src/atombios_output.c @@ -398,26 +398,38 @@ atombios_output_dig_encoder_setup(xf86OutputPtr output, int device, DisplayModeP AtomBiosArgRec data; unsigned char *space; int index; + int major, minor; if (radeon_crtc->crtc_id) index = GetIndexIntoMasterTable(COMMAND, DIG2EncoderControl); else index = GetIndexIntoMasterTable(COMMAND, DIG1EncoderControl); + atombios_get_command_table_version(info->atomBIOS, index, &major, &minor); + disp_data.ucAction = ATOM_ENABLE; disp_data.usPixelClock = cpu_to_le16(mode->Clock / 10); - switch (device) { - case ATOM_DEVICE_DFP1_INDEX: - disp_data.ucConfig = ATOM_ENCODER_CONFIG_TRANSMITTER1; - break; - case ATOM_DEVICE_LCD1_INDEX: - case ATOM_DEVICE_DFP3_INDEX: - disp_data.ucConfig = ATOM_ENCODER_CONFIG_TRANSMITTER2; - break; - default: - return ATOM_NOT_IMPLEMENTED; - break; + if (IS_DCE32_VARIANT) { + if (radeon_output->TMDSType == TMDS_UNIPHY) + disp_data.ucConfig = ATOM_ENCODER_CONFIG_V2_TRANSMITTER1; + if (radeon_output->TMDSType == TMDS_UNIPHY1) + disp_data.ucConfig = ATOM_ENCODER_CONFIG_V2_TRANSMITTER2; + if (radeon_output->TMDSType == TMDS_UNIPHY2) + disp_data.ucConfig = ATOM_ENCODER_CONFIG_V2_TRANSMITTER3; + } else { + switch (device) { + case ATOM_DEVICE_DFP1_INDEX: + disp_data.ucConfig = ATOM_ENCODER_CONFIG_TRANSMITTER1; + break; + case ATOM_DEVICE_LCD1_INDEX: + case ATOM_DEVICE_DFP3_INDEX: + disp_data.ucConfig = ATOM_ENCODER_CONFIG_TRANSMITTER2; + break; + default: + return ATOM_NOT_IMPLEMENTED; + break; + } } if (mode->Clock > 165000) { @@ -442,7 +454,7 @@ atombios_output_dig_encoder_setup(xf86OutputPtr output, int device, DisplayModeP data.exec.pspace = &disp_data; if (RHDAtomBiosFunc(info->atomBIOS->scrnIndex, info->atomBIOS, ATOMBIOS_EXEC, &data) == ATOM_SUCCESS) { - ErrorF("Output DIG%d setup success\n", radeon_crtc->crtc_id + 1); + ErrorF("Output DIG%d encoder setup success\n", radeon_crtc->crtc_id + 1); return ATOM_SUCCESS; } @@ -451,86 +463,140 @@ atombios_output_dig_encoder_setup(xf86OutputPtr output, int device, DisplayModeP } +union dig_transmitter_control { + DIG_TRANSMITTER_CONTROL_PS_ALLOCATION v1; + DIG_TRANSMITTER_CONTROL_PARAMETERS_V2 v2; +}; + static int atombios_output_dig_transmitter_setup(xf86OutputPtr output, int device, DisplayModePtr mode) { RADEONOutputPrivatePtr radeon_output = output->driver_private; RADEONCrtcPrivatePtr radeon_crtc = output->crtc->driver_private; RADEONInfoPtr info = RADEONPTR(output->scrn); - DIG_TRANSMITTER_CONTROL_PS_ALLOCATION disp_data; + union dig_transmitter_control disp_data; AtomBiosArgRec data; unsigned char *space; int index, num = 0; + int major, minor; - switch (device) { - case ATOM_DEVICE_DFP1_INDEX: - index = GetIndexIntoMasterTable(COMMAND, DIG1TransmitterControl); - num = 1; - break; - case ATOM_DEVICE_LCD1_INDEX: - case ATOM_DEVICE_DFP3_INDEX: - index = GetIndexIntoMasterTable(COMMAND, DIG2TransmitterControl); - num = 2; - break; - default: - return ATOM_NOT_IMPLEMENTED; - break; + memset(&disp_data,0, sizeof(disp_data)); + if (IS_DCE32_VARIANT) + index = GetIndexIntoMasterTable(COMMAND, UNIPHYTransmitterControl); + else { + switch (device) { + case ATOM_DEVICE_DFP1_INDEX: + index = GetIndexIntoMasterTable(COMMAND, DIG1TransmitterControl); + num = 1; + break; + case ATOM_DEVICE_LCD1_INDEX: + case ATOM_DEVICE_DFP3_INDEX: + index = GetIndexIntoMasterTable(COMMAND, DIG2TransmitterControl); + num = 2; + break; + default: + return ATOM_NOT_IMPLEMENTED; + break; + } } - disp_data.ucAction = ATOM_TRANSMITTER_ACTION_ENABLE; - disp_data.usPixelClock = cpu_to_le16(mode->Clock / 10); - disp_data.ucConfig = ATOM_TRANSMITTER_CONFIG_CLKSRC_PPLL; + atombios_get_command_table_version(info->atomBIOS, index, &major, &minor); - if (radeon_crtc->crtc_id) - disp_data.ucConfig |= ATOM_TRANSMITTER_CONFIG_DIG2_ENCODER; - else - disp_data.ucConfig |= ATOM_TRANSMITTER_CONFIG_DIG1_ENCODER; - - if (OUTPUT_IS_DVI || (radeon_output->type == OUTPUT_HDMI)) { - if (radeon_output->coherent_mode) { - disp_data.ucConfig |= ATOM_TRANSMITTER_CONFIG_COHERENT; - xf86DrvMsg(output->scrn->scrnIndex, X_INFO, "DIG%d transmitter: Coherent Mode enabled\n", num); - } else - xf86DrvMsg(output->scrn->scrnIndex, X_INFO, "DIG%d transmitter: Coherent Mode disabled\n", num); - } + disp_data.v1.ucAction = ATOM_TRANSMITTER_ACTION_ENABLE; - if (info->IsIGP && (radeon_output->TMDSType == TMDS_UNIPHY)) { + if (IS_DCE32_VARIANT) { if (mode->Clock > 165000) { - disp_data.ucConfig |= (ATOM_TRANSMITTER_CONFIG_8LANE_LINK | - ATOM_TRANSMITTER_CONFIG_LINKA_B); - /* guess */ - if (radeon_output->igp_lane_info & 0x3) - disp_data.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_0_7; - else if (radeon_output->igp_lane_info & 0xc) - disp_data.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_8_15; + disp_data.v2.usPixelClock = cpu_to_le16((mode->Clock * 10 * 2) / 100); + disp_data.v2.acConfig.fDualLinkConnector = 1; } else { - disp_data.ucConfig |= ATOM_TRANSMITTER_CONFIG_LINKA; - if (radeon_output->igp_lane_info & 0x1) - disp_data.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_0_3; - else if (radeon_output->igp_lane_info & 0x2) - disp_data.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_4_7; - else if (radeon_output->igp_lane_info & 0x4) - disp_data.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_8_11; - else if (radeon_output->igp_lane_info & 0x8) - disp_data.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_12_15; + disp_data.v2.usPixelClock = cpu_to_le16((mode->Clock * 10 * 4) / 100); + } + if (radeon_crtc->crtc_id) + disp_data.v2.acConfig.ucEncoderSel = 1; + + switch (radeon_output->TMDSType) { + case TMDS_UNIPHY: + disp_data.v2.acConfig.ucTransmitterSel = 0; + num = 0; + break; + case TMDS_UNIPHY1: + disp_data.v2.acConfig.ucTransmitterSel = 1; + num = 1; + break; + case TMDS_UNIPHY2: + disp_data.v2.acConfig.ucTransmitterSel = 2; + num = 2; + break; + default: + return ATOM_NOT_IMPLEMENTED; + break; + } + + if (OUTPUT_IS_DVI || (radeon_output->type == OUTPUT_HDMI)) { + if (radeon_output->coherent_mode) { + disp_data.v2.acConfig.fCoherentMode = 1; + xf86DrvMsg(output->scrn->scrnIndex, X_INFO, "UNIPHY%d transmitter: Coherent Mode enabled\n",disp_data.v2.acConfig.ucTransmitterSel); + } else + xf86DrvMsg(output->scrn->scrnIndex, X_INFO, "UNIPHY%d transmitter: Coherent Mode disabled\n",disp_data.v2.acConfig.ucTransmitterSel); } } else { - if (mode->Clock > 165000) - disp_data.ucConfig |= (ATOM_TRANSMITTER_CONFIG_8LANE_LINK | - ATOM_TRANSMITTER_CONFIG_LINKA_B | - ATOM_TRANSMITTER_CONFIG_LANE_0_7); + disp_data.v1.ucConfig = ATOM_TRANSMITTER_CONFIG_CLKSRC_PPLL; + disp_data.v1.usPixelClock = cpu_to_le16((mode->Clock) / 10); + + if (radeon_crtc->crtc_id) + disp_data.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_DIG2_ENCODER; else - disp_data.ucConfig |= ATOM_TRANSMITTER_CONFIG_LINKA | ATOM_TRANSMITTER_CONFIG_LANE_0_3; + disp_data.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_DIG1_ENCODER; + + if (OUTPUT_IS_DVI || (radeon_output->type == OUTPUT_HDMI)) { + if (radeon_output->coherent_mode) { + disp_data.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_COHERENT; + xf86DrvMsg(output->scrn->scrnIndex, X_INFO, "DIG%d transmitter: Coherent Mode enabled\n", num); + } else + xf86DrvMsg(output->scrn->scrnIndex, X_INFO, "DIG%d transmitter: Coherent Mode disabled\n", num); + } + + if (info->IsIGP && (radeon_output->TMDSType == TMDS_UNIPHY)) { + if (mode->Clock > 165000) { + disp_data.v1.ucConfig |= (ATOM_TRANSMITTER_CONFIG_8LANE_LINK | + ATOM_TRANSMITTER_CONFIG_LINKA_B); + /* guess */ + if (radeon_output->igp_lane_info & 0x3) + disp_data.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_0_7; + else if (radeon_output->igp_lane_info & 0xc) + disp_data.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_8_15; + } else { + disp_data.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LINKA; + if (radeon_output->igp_lane_info & 0x1) + disp_data.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_0_3; + else if (radeon_output->igp_lane_info & 0x2) + disp_data.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_4_7; + else if (radeon_output->igp_lane_info & 0x4) + disp_data.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_8_11; + else if (radeon_output->igp_lane_info & 0x8) + disp_data.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_12_15; + } + } else { + if (mode->Clock > 165000) + disp_data.v1.ucConfig |= (ATOM_TRANSMITTER_CONFIG_8LANE_LINK | + ATOM_TRANSMITTER_CONFIG_LINKA_B | + ATOM_TRANSMITTER_CONFIG_LANE_0_7); + else + disp_data.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LINKA | ATOM_TRANSMITTER_CONFIG_LANE_0_3; + } } - radeon_output->transmitter_config = disp_data.ucConfig; - + radeon_output->transmitter_config = disp_data.v1.ucConfig; + data.exec.index = index; data.exec.dataSpace = (void *)&space; data.exec.pspace = &disp_data; if (RHDAtomBiosFunc(info->atomBIOS->scrnIndex, info->atomBIOS, ATOMBIOS_EXEC, &data) == ATOM_SUCCESS) { - ErrorF("Output DIG%d transmitter setup success\n", num); + if (IS_DCE32_VARIANT) + ErrorF("Output UNIPHY%d transmitter setup success\n", num); + else + ErrorF("Output DIG%d transmitter setup success\n", num); return ATOM_SUCCESS; } @@ -625,10 +691,16 @@ atombios_device_dpms(xf86OutputPtr output, int device, int mode) index = GetIndexIntoMasterTable(COMMAND, LCD1OutputControl); break; case ATOM_DEVICE_TV1_SUPPORT: - index = GetIndexIntoMasterTable(COMMAND, TV1OutputControl); + if (IS_DCE3_VARIANT) + index = GetIndexIntoMasterTable(COMMAND, DAC2OutputControl); + else + index = GetIndexIntoMasterTable(COMMAND, TV1OutputControl); break; case ATOM_DEVICE_CV_SUPPORT: - index = GetIndexIntoMasterTable(COMMAND, CV1OutputControl); + if (IS_DCE3_VARIANT) + index = GetIndexIntoMasterTable(COMMAND, DAC2OutputControl); + else + index = GetIndexIntoMasterTable(COMMAND, CV1OutputControl); break; default: return; @@ -655,6 +727,7 @@ atombios_output_dig_dpms(xf86OutputPtr output, int mode, int block) AtomBiosArgRec data; unsigned char *space; + memset(&disp_data, 0, sizeof(disp_data)); switch (mode) { case DPMSModeOn: disp_data.ucAction = ATOM_TRANSMITTER_ACTION_ENABLE_OUTPUT; @@ -668,10 +741,15 @@ atombios_output_dig_dpms(xf86OutputPtr output, int mode, int block) disp_data.ucConfig = radeon_output->transmitter_config; - if (block == 1) - data.exec.index = GetIndexIntoMasterTable(COMMAND, DIG1TransmitterControl); - else - data.exec.index = GetIndexIntoMasterTable(COMMAND, DIG2TransmitterControl); + if (IS_DCE32_VARIANT) { + data.exec.index = GetIndexIntoMasterTable(COMMAND, UNIPHYTransmitterControl); + } + else { + if (block == 1) + data.exec.index = GetIndexIntoMasterTable(COMMAND, DIG1TransmitterControl); + else + data.exec.index = GetIndexIntoMasterTable(COMMAND, DIG2TransmitterControl); + } data.exec.dataSpace = (void *)&space; data.exec.pspace = &disp_data; @@ -708,15 +786,21 @@ atombios_output_dpms(xf86OutputPtr output, int mode) else atombios_device_dpms(output, ATOM_DEVICE_DFP1_SUPPORT, mode); } else if (radeon_output->devices & ATOM_DEVICE_DFP2_SUPPORT) { - if (IS_DCE3_VARIANT) + if (IS_DCE32_VARIANT) + atombios_output_dig_dpms(output, mode, 2); + else if (IS_DCE3_VARIANT) return; // fixme else atombios_device_dpms(output, ATOM_DEVICE_DFP2_SUPPORT, mode); } else if (radeon_output->devices & ATOM_DEVICE_DFP3_SUPPORT) { if (IS_DCE3_VARIANT) - atombios_output_dig_dpms(output, mode, 2); + atombios_output_dig_dpms(output, mode, 0); else atombios_device_dpms(output, ATOM_DEVICE_DFP3_SUPPORT, mode); + } else if (radeon_output->devices & ATOM_DEVICE_DFP4_SUPPORT) { + atombios_output_dig_dpms(output, mode, 1); + } else if (radeon_output->devices & ATOM_DEVICE_DFP5_SUPPORT) { + atombios_output_dig_dpms(output, mode, 2); } } else if (radeon_output->MonType == MT_CRT) { /*ErrorF("AGD: dac dpms\n");*/ @@ -750,6 +834,8 @@ atombios_set_output_crtc_source(xf86OutputPtr output) int index = GetIndexIntoMasterTable(COMMAND, SelectCRTC_Source); int major, minor; + memset(&crtc_src_param, 0, sizeof(crtc_src_param)); + memset(&crtc_src_param2, 0, sizeof(crtc_src_param2)); atombios_get_command_table_version(info->atomBIOS, index, &major, &minor); /*ErrorF("select crtc source table is %d %d\n", major, minor);*/ @@ -774,6 +860,10 @@ atombios_set_output_crtc_source(xf86OutputPtr output) crtc_src_param.ucDevice = ATOM_DEVICE_DFP2_INDEX; else if (radeon_output->devices & ATOM_DEVICE_DFP3_SUPPORT) crtc_src_param.ucDevice = ATOM_DEVICE_DFP3_INDEX; + else if (radeon_output->devices & ATOM_DEVICE_DFP4_SUPPORT) + crtc_src_param.ucDevice = ATOM_DEVICE_DFP4_INDEX; + else if (radeon_output->devices & ATOM_DEVICE_DFP5_SUPPORT) + crtc_src_param.ucDevice = ATOM_DEVICE_DFP5_INDEX; } else if (radeon_output->MonType == MT_LCD) { if (radeon_output->devices & ATOM_DEVICE_LCD1_SUPPORT) crtc_src_param.ucDevice = ATOM_DEVICE_LCD1_INDEX; @@ -790,18 +880,26 @@ atombios_set_output_crtc_source(xf86OutputPtr output) case 2: crtc_src_param2.ucCRTC = radeon_crtc->crtc_id; if (radeon_output->MonType == MT_CRT) { + crtc_src_param2.ucEncodeMode = ATOM_ENCODER_MODE_CRT; if (radeon_output->devices & ATOM_DEVICE_CRT1_SUPPORT) - crtc_src_param2.ucEncoderID = ATOM_DEVICE_CRT1_INDEX; + crtc_src_param2.ucEncoderID = ASIC_INT_DAC1_ENCODER_ID; else if (radeon_output->devices & ATOM_DEVICE_CRT2_SUPPORT) - crtc_src_param2.ucEncoderID = ATOM_DEVICE_CRT2_INDEX; - crtc_src_param2.ucEncodeMode = ATOM_ENCODER_MODE_CRT; + crtc_src_param2.ucEncoderID = ASIC_INT_DAC2_ENCODER_ID; } else if (radeon_output->MonType == MT_DFP) { - if (radeon_output->devices & ATOM_DEVICE_DFP1_SUPPORT) - crtc_src_param2.ucEncoderID = ATOM_DEVICE_DFP1_INDEX; - else if (radeon_output->devices & ATOM_DEVICE_DFP2_SUPPORT) - crtc_src_param2.ucEncoderID = ATOM_DEVICE_DFP2_INDEX; - else if (radeon_output->devices & ATOM_DEVICE_DFP3_SUPPORT) - crtc_src_param2.ucEncoderID = ATOM_DEVICE_DFP3_INDEX; + if (IS_DCE3_VARIANT) { + /* we route digital encoders using the CRTC ids */ + if (radeon_crtc->crtc_id) + crtc_src_param2.ucEncoderID = ASIC_INT_DIG2_ENCODER_ID; + else + crtc_src_param2.ucEncoderID = ASIC_INT_DIG1_ENCODER_ID; + } else { + if (radeon_output->devices & ATOM_DEVICE_DFP1_SUPPORT) + crtc_src_param2.ucEncoderID = ATOM_DEVICE_DFP1_INDEX; + else if (radeon_output->devices & ATOM_DEVICE_DFP2_SUPPORT) + crtc_src_param2.ucEncoderID = ATOM_DEVICE_DFP2_INDEX; + else if (radeon_output->devices & ATOM_DEVICE_DFP3_SUPPORT) + crtc_src_param2.ucEncoderID = ATOM_DEVICE_DFP3_INDEX; + } if (OUTPUT_IS_DVI) crtc_src_param2.ucEncodeMode = ATOM_ENCODER_MODE_DVI; else if (radeon_output->type == OUTPUT_HDMI) @@ -896,8 +994,9 @@ atombios_output_mode_set(xf86OutputPtr output, } else atombios_output_digital_setup(output, ATOM_DEVICE_DFP1_INDEX, adjusted_mode); } else if (radeon_output->devices & ATOM_DEVICE_DFP2_SUPPORT) { - if (IS_DCE3_VARIANT) { - // fix me + if (IS_DCE32_VARIANT) { + atombios_output_dig_encoder_setup(output, ATOM_DEVICE_DFP2_INDEX, adjusted_mode); + atombios_output_dig_transmitter_setup(output, ATOM_DEVICE_DFP2_INDEX, adjusted_mode); } else { if ((info->ChipFamily == CHIP_FAMILY_RS600) || (info->ChipFamily == CHIP_FAMILY_RS690) || @@ -912,6 +1011,12 @@ atombios_output_mode_set(xf86OutputPtr output, atombios_output_dig_transmitter_setup(output, ATOM_DEVICE_DFP3_INDEX, adjusted_mode); } else atombios_output_digital_setup(output, ATOM_DEVICE_DFP3_INDEX, adjusted_mode); + } else if (radeon_output->devices & ATOM_DEVICE_DFP4_SUPPORT) { + atombios_output_dig_encoder_setup(output, ATOM_DEVICE_DFP4_INDEX, adjusted_mode); + atombios_output_dig_transmitter_setup(output, ATOM_DEVICE_DFP4_INDEX, adjusted_mode); + } else if (radeon_output->devices & ATOM_DEVICE_DFP5_SUPPORT) { + atombios_output_dig_encoder_setup(output, ATOM_DEVICE_DFP5_INDEX, adjusted_mode); + atombios_output_dig_transmitter_setup(output, ATOM_DEVICE_DFP5_INDEX, adjusted_mode); } } else if (radeon_output->MonType == MT_LCD) { if (radeon_output->devices & ATOM_DEVICE_LCD1_SUPPORT) { diff --git a/src/radeon.h b/src/radeon.h index 8dc8f23e..818ec4dc 100644 --- a/src/radeon.h +++ b/src/radeon.h @@ -324,6 +324,7 @@ typedef enum { CHIP_FAMILY_RV635, CHIP_FAMILY_RS780, CHIP_FAMILY_RV770, + CHIP_FAMILY_RV730, CHIP_FAMILY_LAST } RADEONChipFamily; @@ -349,6 +350,8 @@ typedef enum { #define IS_DCE3_VARIANT ((info->ChipFamily >= CHIP_FAMILY_RV620)) +#define IS_DCE32_VARIANT ((info->ChipFamily >= CHIP_FAMILY_RV730)) + #define IS_R500_3D ((info->ChipFamily == CHIP_FAMILY_RV515) || \ (info->ChipFamily == CHIP_FAMILY_R520) || \ (info->ChipFamily == CHIP_FAMILY_RV530) || \ diff --git a/src/radeon_atombios.c b/src/radeon_atombios.c index 6e214cef..d6125721 100644 --- a/src/radeon_atombios.c +++ b/src/radeon_atombios.c @@ -1660,6 +1660,26 @@ RADEONGetATOMConnectorInfoFromBIOSObject (ScrnInfoPtr pScrn) info->BiosConnector[i].TMDSType = TMDS_UNIPHY; } break; + case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1: + if (info->BiosConnector[i].ConnectorType == CONNECTOR_LVDS) + info->BiosConnector[i].devices |= (1 << ATOM_DEVICE_LCD1_INDEX); + else { + if (num == 1) + info->BiosConnector[i].devices |= (1 << ATOM_DEVICE_DFP3_INDEX); + else + info->BiosConnector[i].devices |= (1 << ATOM_DEVICE_DFP4_INDEX); + info->BiosConnector[i].TMDSType = TMDS_UNIPHY1; + } + break; + + case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2: + if (info->BiosConnector[i].ConnectorType == CONNECTOR_LVDS) + info->BiosConnector[i].devices |= (1 << ATOM_DEVICE_LCD1_INDEX); + else { + info->BiosConnector[i].devices |= (1 << ATOM_DEVICE_DFP5_INDEX); + info->BiosConnector[i].TMDSType = TMDS_UNIPHY2; + } + break; case ENCODER_OBJECT_ID_INTERNAL_TMDS2: case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1: info->BiosConnector[i].devices |= (1 << ATOM_DEVICE_DFP2_INDEX); diff --git a/src/radeon_probe.h b/src/radeon_probe.h index 6014cd44..5cd610cc 100644 --- a/src/radeon_probe.h +++ b/src/radeon_probe.h @@ -102,7 +102,9 @@ typedef enum TMDS_EXT = 2, TMDS_LVTMA = 3, TMDS_DDIA = 4, - TMDS_UNIPHY = 5 + TMDS_UNIPHY = 5, + TMDS_UNIPHY1 = 6, + TMDS_UNIPHY2 = 7 } RADEONTmdsType; typedef enum |