RADEON: fix tiling/interlaced interaction with randr 1.2

5 files changed, 47 insertions, 29 deletions

diff --git a/src/atombios_crtc.c b/src/atombios_crtc.c
index a4703c5b..ad7fd54e 100644
--- a/src/atombios_crtc.c
+++ b/src/atombios_crtc.c
@@ -330,22 +330,13 @@ atombios_crtc_mode_set(xf86CrtcPtr crtc,
     int need_tv_timings = 0;
     int i, ret;
     SET_CRTC_TIMING_PARAMETERS_PS_ALLOCATION crtc_timing;
+    Bool tilingChanged = FALSE;
 
     memset(&crtc_timing, 0, sizeof(crtc_timing));
 
     if (info->allowColorTiling) {
-	info->tilingEnabled = (adjusted_mode->Flags & (V_DBLSCAN | V_INTERLACE)) ? FALSE : TRUE;
-#ifdef XF86DRI
-	if (info->directRenderingEnabled && (info->tilingEnabled != tilingOld)) {
-	    RADEONSAREAPrivPtr pSAREAPriv;
-	    if (RADEONDRISetParam(pScrn, RADEON_SETPARAM_SWITCH_TILING, (info->tilingEnabled ? 1 : 0)) < 0)
-		xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-			   "[drm] failed changing tiling status\n");
-	    /* if this is called during ScreenInit() we don't have pScrn->pScreen yet */
-	    pSAREAPriv = DRIGetSAREAPrivate(screenInfo.screens[pScrn->scrnIndex]);
-	    info->tilingEnabled = pSAREAPriv->tiling_enabled ? TRUE : FALSE;
-	}
-#endif
+        radeon_crtc->can_tile = (adjusted_mode->Flags & (V_DBLSCAN | V_INTERLACE)) ? FALSE : TRUE;
+	tilingChanged = RADEONSetTiling(pScrn);
     }
 
     for (i = 0; i < xf86_config->num_output; i++) {
@@ -487,7 +478,7 @@ atombios_crtc_mode_set(xf86CrtcPtr crtc,
 
     atombios_set_crtc_timing(info->atomBIOS, &crtc_timing);
 
-    if (info->tilingEnabled != tilingOld) {
+    if (tilingChanged) {
 	/* need to redraw front buffer, I guess this can be considered a hack ? */
 	/* if this is called during ScreenInit() we don't have pScrn->pScreen yet */
 	if (pScrn->pScreen)
diff --git a/src/legacy_crtc.c b/src/legacy_crtc.c
index dec14a4a..63f536c2 100644
--- a/src/legacy_crtc.c
+++ b/src/legacy_crtc.c
@@ -1658,26 +1658,15 @@ legacy_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode,
     xf86CrtcConfigPtr   xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
     RADEONCrtcPrivatePtr radeon_crtc = crtc->driver_private;
     RADEONInfoPtr info = RADEONPTR(pScrn);
-    Bool           tilingOld   = info->tilingEnabled;
     int i = 0;
     double dot_clock = 0;
     int pll_flags = RADEON_PLL_LEGACY;
     Bool update_tv_routing = FALSE;
-
+    Bool tilingChanged = FALSE;
 
     if (info->allowColorTiling) {
-	info->tilingEnabled = (adjusted_mode->Flags & (V_DBLSCAN | V_INTERLACE)) ? FALSE : TRUE;
-#ifdef XF86DRI
-	if (info->directRenderingEnabled && (info->tilingEnabled != tilingOld)) {
-	    RADEONSAREAPrivPtr pSAREAPriv;
-	    if (RADEONDRISetParam(pScrn, RADEON_SETPARAM_SWITCH_TILING, (info->tilingEnabled ? 1 : 0)) < 0)
-		xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-			   "[drm] failed changing tiling status\n");
-	    /* if this is called during ScreenInit() we don't have pScrn->pScreen yet */
-	    pSAREAPriv = DRIGetSAREAPrivate(screenInfo.screens[pScrn->scrnIndex]);
-	    info->tilingEnabled = pSAREAPriv->tiling_enabled ? TRUE : FALSE;
-	}
-#endif
+        radeon_crtc->can_tile = (adjusted_mode->Flags & (V_DBLSCAN | V_INTERLACE)) ? FALSE : TRUE;
+	tilingChanged = RADEONSetTiling(pScrn);
     }
 
     for (i = 0; i < xf86_config->num_output; i++) {
@@ -1771,7 +1760,7 @@ legacy_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode,
     if (info->DispPriority)
 	RADEONInitDispBandwidth(pScrn);
 
-    if (info->tilingEnabled != tilingOld) {
+    if (tilingChanged) {
 	/* need to redraw front buffer, I guess this can be considered a hack ? */
 	/* if this is called during ScreenInit() we don't have pScrn->pScreen yet */
 	if (pScrn->pScreen)
diff --git a/src/radeon.h b/src/radeon.h
index 57786c80..fe45428e 100644
--- a/src/radeon.h
+++ b/src/radeon.h
@@ -850,7 +850,7 @@ extern void        RADEONGetPanelInfo(ScrnInfoPtr pScrn);
 extern void        RADEONUnblank(ScrnInfoPtr pScrn);
 extern void        RADEONUnblank(ScrnInfoPtr pScrn);
 extern void        RADEONBlank(ScrnInfoPtr pScrn);
-
+extern Bool        RADEONSetTiling(ScrnInfoPtr pScrn);
 extern Bool RADEONAllocateControllers(ScrnInfoPtr pScrn, int mask);
 extern Bool RADEONAllocateConnectors(ScrnInfoPtr pScrn);
 
diff --git a/src/radeon_crtc.c b/src/radeon_crtc.c
index 7164138e..3628d969 100644
--- a/src/radeon_crtc.c
+++ b/src/radeon_crtc.c
@@ -723,3 +723,39 @@ RADEONUnblank(ScrnInfoPtr pScrn)
     }
 }
 
+Bool
+RADEONSetTiling(ScrnInfoPtr pScrn)
+{
+    xf86CrtcConfigPtr   xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
+    RADEONInfoPtr info = RADEONPTR(pScrn);
+    RADEONCrtcPrivatePtr radeon_crtc;
+    xf86CrtcPtr crtc;
+    int c;
+    int can_tile = 1;
+    Bool changed = FALSE;
+
+    for (c = 0; c < xf86_config->num_crtc; c++) {
+	crtc = xf86_config->crtc[c];
+	radeon_crtc = crtc->driver_private;
+
+	if (!radeon_crtc->can_tile)
+	    can_tile = 0;
+    }	
+
+    if (info->tilingEnabled != can_tile)
+	changed = TRUE;
+
+#ifdef XF86DRI
+    if (info->directRenderingEnabled && (info->tilingEnabled != can_tile)) {
+	RADEONSAREAPrivPtr pSAREAPriv;
+	if (RADEONDRISetParam(pScrn, RADEON_SETPARAM_SWITCH_TILING, (info->tilingEnabled ? 1 : 0)) < 0)
+	    xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+		       "[drm] failed changing tiling status\n");
+	/* if this is called during ScreenInit() we don't have pScrn->pScreen yet */
+	pSAREAPriv = DRIGetSAREAPrivate(screenInfo.screens[pScrn->scrnIndex]);
+	info->tilingEnabled = pSAREAPriv->tiling_enabled ? TRUE : FALSE;
+    }
+#endif
+
+    return changed;
+}
diff --git a/src/radeon_probe.h b/src/radeon_probe.h
index 935b6b82..4ba6a32d 100644
--- a/src/radeon_probe.h
+++ b/src/radeon_probe.h
@@ -197,6 +197,8 @@ typedef struct _RADEONCrtcPrivateRec {
     int               fb_pitch, fb_width, fb_height;
     INT16             cursor_x;
     INT16             cursor_y;
+
+    int can_tile;
 } RADEONCrtcPrivateRec, *RADEONCrtcPrivatePtr;
 
 typedef struct {