diff options
author | Alex Deucher <alex@botch2.(none)> | 2007-11-04 14:11:26 -0500 |
---|---|---|
committer | Alex Deucher <alex@botch2.(none)> | 2007-11-04 14:11:26 -0500 |
commit | 78a3eabff382e8ebe33df2039076fb083bcc361b (patch) | |
tree | b9a3f0e339bea01ab954de3c9c97f24b7a0efa13 | |
parent | 5e9ebd8e496b72b051053d637c63b2956b7861d3 (diff) |
WIP: get ATOM crtc stuff working on r4xx
-rw-r--r-- | src/radeon_bios.c | 2 | ||||
-rw-r--r-- | src/radeon_crtc.c | 67 | ||||
-rw-r--r-- | src/radeon_output.c | 44 |
3 files changed, 102 insertions, 11 deletions
diff --git a/src/radeon_bios.c b/src/radeon_bios.c index ec302189..972001b0 100644 --- a/src/radeon_bios.c +++ b/src/radeon_bios.c @@ -151,7 +151,7 @@ Bool RADEONGetBIOSInfo(ScrnInfoPtr pScrn, xf86Int10InfoPtr pInt10) info->FbFreeStart = atomBiosArg.fb.start; info->FbFreeSize = atomBiosArg.fb.size; } - rhdTestAtomBIOS(info->atomBIOS); + //rhdTestAtomBIOS(info->atomBIOS); #endif info->MasterDataStart = RADEON_BIOS16 (info->ROMHeaderStart + 32); } diff --git a/src/radeon_crtc.c b/src/radeon_crtc.c index de242730..55307136 100644 --- a/src/radeon_crtc.c +++ b/src/radeon_crtc.c @@ -54,7 +54,13 @@ #endif void radeon_crtc_load_lut(xf86CrtcPtr crtc); - +#if 0 +extern void atombios_crtc_mode_set(xf86CrtcPtr crtc, + DisplayModePtr mode, + DisplayModePtr adjusted_mode, + int x, int y); +extern void atombios_crtc_dpms(xf86CrtcPtr crtc, int mode); +#endif static void radeon_crtc_dpms(xf86CrtcPtr crtc, int mode) { @@ -63,7 +69,14 @@ radeon_crtc_dpms(xf86CrtcPtr crtc, int mode) RADEONCrtcPrivatePtr radeon_crtc = crtc->driver_private; RADEONInfoPtr info = RADEONPTR(pScrn); unsigned char *RADEONMMIO = info->MMIO; - + +#if 1 + if (info->IsAtomBios) { + atombios_crtc_dpms(crtc, mode); + //return; + } +#endif + mask = radeon_crtc->crtc_id ? (RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_VSYNC_DIS | RADEON_CRTC2_HSYNC_DIS | RADEON_CRTC2_DISP_REQ_EN_B) : (RADEON_CRTC_DISPLAY_DIS | RADEON_CRTC_HSYNC_DIS | RADEON_CRTC_VSYNC_DIS); @@ -116,7 +129,15 @@ radeon_crtc_mode_fixup(xf86CrtcPtr crtc, DisplayModePtr mode, static void radeon_crtc_mode_prepare(xf86CrtcPtr crtc) { - radeon_crtc_dpms(crtc, DPMSModeOff); + ScrnInfoPtr pScrn = crtc->scrn; + RADEONInfoPtr info = RADEONPTR(pScrn); + +#if 1 + if (info->IsAtomBios) + atombios_crtc_dpms(crtc, DPMSModeOff); + else +#endif + radeon_crtc_dpms(crtc, DPMSModeOff); } /* Define common registers for requested video mode */ @@ -168,7 +189,7 @@ RADEONInitSurfaceCntl(xf86CrtcPtr crtc, RADEONSavePtr save) } -static Bool +Bool RADEONInitCrtcBase(xf86CrtcPtr crtc, RADEONSavePtr save, int x, int y) { @@ -286,7 +307,7 @@ RADEONInitCrtcBase(xf86CrtcPtr crtc, RADEONSavePtr save, } /* Define CRTC registers for requested video mode */ -static Bool +Bool RADEONInitCrtcRegisters(xf86CrtcPtr crtc, RADEONSavePtr save, DisplayModePtr mode) { @@ -399,7 +420,7 @@ RADEONInitCrtcRegisters(xf86CrtcPtr crtc, RADEONSavePtr save, return TRUE; } -static Bool +Bool RADEONInitCrtc2Base(xf86CrtcPtr crtc, RADEONSavePtr save, int x, int y) { @@ -512,7 +533,7 @@ RADEONInitCrtc2Base(xf86CrtcPtr crtc, RADEONSavePtr save, } /* Define CRTC2 registers for requested video mode */ -static Bool +Bool RADEONInitCrtc2Registers(xf86CrtcPtr crtc, RADEONSavePtr save, DisplayModePtr mode) { @@ -812,6 +833,13 @@ radeon_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode, #endif } +#if 0 + if (info->IsAtomBios) { + atombios_crtc_mode_set(crtc, mode, adjusted_mode, x, y); + return; + } +#endif + for (i = 0; i < xf86_config->num_output; i++) { xf86OutputPtr output = xf86_config->output[i]; RADEONOutputPrivatePtr radeon_output = output->driver_private; @@ -888,6 +916,14 @@ radeon_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode, ErrorF("restore common\n"); RADEONRestoreCommonRegisters(pScrn, &info->ModeReg); +#if 1 + if (info->IsAtomBios) { + //RADEONRestoreCrtcRegisters(pScrn, &info->ModeReg); + atombios_crtc_mode_set(crtc, mode, adjusted_mode, x, y); + return; + } +#endif + switch (radeon_crtc->crtc_id) { case 0: ErrorF("restore crtc1\n"); @@ -924,12 +960,27 @@ radeon_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode, /* reset ecp_div for Xv */ info->ecp_div = -1; +#if 0 + if (info->IsAtomBios) { + atombios_crtc_mode_set(crtc, mode, adjusted_mode, x, y); + //return; + } +#endif + } static void radeon_crtc_mode_commit(xf86CrtcPtr crtc) { - radeon_crtc_dpms(crtc, DPMSModeOn); + ScrnInfoPtr pScrn = crtc->scrn; + RADEONInfoPtr info = RADEONPTR(pScrn); + +#if 1 + if (info->IsAtomBios) + atombios_crtc_dpms(crtc, DPMSModeOn); + //else +#endif + radeon_crtc_dpms(crtc, DPMSModeOn); } void radeon_crtc_load_lut(xf86CrtcPtr crtc) diff --git a/src/radeon_output.c b/src/radeon_output.c index 9cfc2c42..d00908b9 100644 --- a/src/radeon_output.c +++ b/src/radeon_output.c @@ -154,7 +154,12 @@ static RADEONMonitorType radeon_detect_primary_dac(ScrnInfoPtr pScrn, Bool color static RADEONMonitorType radeon_detect_tv_dac(ScrnInfoPtr pScrn, Bool color); static RADEONMonitorType radeon_detect_ext_dac(ScrnInfoPtr pScrn); static void RADEONGetTMDSInfoFromTable(xf86OutputPtr output); - +#if 0 +extern void atombios_output_mode_set(xf86OutputPtr output, + DisplayModePtr mode, + DisplayModePtr adjusted_mode); +extern void atombios_output_dpms(xf86OutputPtr output, int mode); +#endif Bool RADEONDVOReadByte(I2CDevPtr dvo, int addr, CARD8 *ch) { @@ -706,6 +711,16 @@ static RADEONMonitorType RADEONPortCheckNonDDC(ScrnInfoPtr pScrn, xf86OutputPtr static void radeon_dpms(xf86OutputPtr output, int mode) { + ScrnInfoPtr pScrn = output->scrn; + RADEONInfoPtr info = RADEONPTR(pScrn); + +#if 1 + if (info->IsAtomBios) { + atombios_output_dpms(output, mode); + return; + } +#endif + switch(mode) { case DPMSModeOn: RADEONEnableDisplay(output, TRUE); @@ -1153,6 +1168,15 @@ radeon_mode_set(xf86OutputPtr output, DisplayModePtr mode, xf86CrtcPtr crtc = output->crtc; RADEONCrtcPrivatePtr radeon_crtc = crtc->driver_private; +#if 0 + if (info->IsAtomBios) { + ErrorF("AGD: output mode set start\n"); + atombios_output_mode_set(output, mode, adjusted_mode); + ErrorF("AGD: output mode set end\n"); + return; + } +#endif + RADEONInitOutputRegisters(pScrn, &info->ModeReg, adjusted_mode, output, radeon_crtc->crtc_id); if (radeon_crtc->crtc_id == 0) @@ -1184,12 +1208,28 @@ radeon_mode_set(xf86OutputPtr output, DisplayModePtr mode, RADEONRestoreDACRegisters(pScrn, &info->ModeReg); } +#if 0 + if (info->IsAtomBios) { + ErrorF("AGD: output mode set start\n"); + atombios_output_mode_set(output, mode, adjusted_mode); + ErrorF("AGD: output mode set end\n"); + //return; + } +#endif + } static void radeon_mode_commit(xf86OutputPtr output) { - RADEONEnableDisplay(output, TRUE); + ScrnInfoPtr pScrn = output->scrn; + RADEONInfoPtr info = RADEONPTR(pScrn); +#if 1 + if (info->IsAtomBios) + atombios_output_dpms(output, DPMSModeOn); + //else +#endif + RADEONEnableDisplay(output, TRUE); } /* the following functions are based on the load detection code |