diff options
author | Alex Deucher <alex@botch2.com> | 2008-04-03 22:04:43 -0400 |
---|---|---|
committer | Alex Deucher <alex@botch2.com> | 2008-04-03 22:04:43 -0400 |
commit | 88a1fe4a94c5d11aff22734b21c89890e4428cd5 (patch) | |
tree | 0adf5c73587a5e2c8fd08dffe2d6d6e995c12030 | |
parent | c40a7aa3989576a8144213e2f31b892d21df8686 (diff) |
Revert "RADEON: remove driver rec copies of mc info, use save rec directly"
This reverts commit be0858a84fbdf74c0b844f462933a221d48c707d.
Conflicts:
src/radeon_driver.c
-rw-r--r-- | src/radeon.h | 3 | ||||
-rw-r--r-- | src/radeon_driver.c | 89 |
2 files changed, 51 insertions, 41 deletions
diff --git a/src/radeon.h b/src/radeon.h index f3db4510..15e494e6 100644 --- a/src/radeon.h +++ b/src/radeon.h @@ -379,6 +379,9 @@ typedef struct { unsigned long BIOSAddr; /* BIOS physical address */ CARD32 fbLocation; CARD32 gartLocation; + CARD32 mc_fb_location; + CARD32 mc_agp_location; + CARD32 mc_agp_location_hi; void *MMIO; /* Map of MMIO region */ void *FB; /* Map of frame buffer */ diff --git a/src/radeon_driver.c b/src/radeon_driver.c index 0183aa32..1528757d 100644 --- a/src/radeon_driver.c +++ b/src/radeon_driver.c @@ -1185,15 +1185,31 @@ static Bool RADEONPreInitWeight(ScrnInfoPtr pScrn) return TRUE; } -static void RADEONInitMemoryMap(ScrnInfoPtr pScrn, RADEONSavePtr save) +static void +RADEONInitMemMapRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save, + RADEONInfoPtr info) +{ + save->mc_fb_location = info->mc_fb_location; + save->mc_agp_location = info->mc_agp_location; + + if (IS_AVIVO_VARIANT) { + save->mc_agp_location_hi = info->mc_agp_location_hi; + } else { + save->display_base_addr = info->fbLocation; + save->display2_base_addr = info->fbLocation; + save->ov0_base_addr = info->fbLocation; + } +} + +static void RADEONInitMemoryMap(ScrnInfoPtr pScrn) { RADEONInfoPtr info = RADEONPTR(pScrn); unsigned char *RADEONMMIO = info->MMIO; CARD32 mem_size; CARD32 aper_size; - radeon_read_mc_fb_agp_location(pScrn, LOC_FB | LOC_AGP, &save->mc_fb_location, - &save->mc_agp_location, &save->mc_agp_location_hi); + radeon_read_mc_fb_agp_location(pScrn, LOC_FB | LOC_AGP, &info->mc_fb_location, + &info->mc_agp_location, &info->mc_agp_location_hi); /* We shouldn't use info->videoRam here which might have been clipped * but the real video RAM instead @@ -1225,13 +1241,13 @@ static void RADEONInitMemoryMap(ScrnInfoPtr pScrn, RADEONSavePtr save) if ((info->ChipFamily != CHIP_FAMILY_RS690) && (info->ChipFamily != CHIP_FAMILY_RS740)) { if (info->IsIGP) - save->mc_fb_location = INREG(RADEON_NB_TOM); + info->mc_fb_location = INREG(RADEON_NB_TOM); else #ifdef XF86DRI /* Old DRI has restrictions on the memory map */ if ( info->directRenderingEnabled && info->pKernelDRMVersion->version_minor < 10 ) - save->mc_fb_location = (mem_size - 1) & 0xffff0000U; + info->mc_fb_location = (mem_size - 1) & 0xffff0000U; else #endif { @@ -1259,19 +1275,19 @@ static void RADEONInitMemoryMap(ScrnInfoPtr pScrn, RADEONSavePtr save) aper0_base &= ~(mem_size - 1); if (info->ChipFamily >= CHIP_FAMILY_R600) { - save->mc_fb_location = (aper0_base >> 24) | + info->mc_fb_location = (aper0_base >> 24) | (((aper0_base + mem_size - 1) & 0xff000000U) >> 8); - ErrorF("mc fb loc is %08x\n", (unsigned int)save->mc_fb_location); + ErrorF("mc fb loc is %08x\n", (unsigned int)info->mc_fb_location); } else { - save->mc_fb_location = (aper0_base >> 16) | + info->mc_fb_location = (aper0_base >> 16) | ((aper0_base + mem_size - 1) & 0xffff0000U); } } } if (info->ChipFamily >= CHIP_FAMILY_R600) { - info->fbLocation = (save->mc_fb_location & 0xffff) << 24; + info->fbLocation = (info->mc_fb_location & 0xffff) << 24; } else { - info->fbLocation = (save->mc_fb_location & 0xffff) << 16; + info->fbLocation = (info->mc_fb_location & 0xffff) << 16; } /* Just disable the damn AGP apertures for now, it may be * re-enabled later by the DRM @@ -1279,27 +1295,22 @@ static void RADEONInitMemoryMap(ScrnInfoPtr pScrn, RADEONSavePtr save) if (IS_AVIVO_VARIANT) { if (info->ChipFamily >= CHIP_FAMILY_R600) { - OUTREG(R600_HDP_NONSURFACE_BASE, (save->mc_fb_location << 16) & 0xff0000); + OUTREG(R600_HDP_NONSURFACE_BASE, (info->mc_fb_location << 16) & 0xff0000); } else { - OUTREG(AVIVO_HDP_FB_LOCATION, save->mc_fb_location); + OUTREG(AVIVO_HDP_FB_LOCATION, info->mc_fb_location); } - save->mc_agp_location = 0x003f0000; - } else { - save->mc_agp_location = 0xffffffc0; - save->display_base_addr = info->fbLocation; - save->display2_base_addr = info->fbLocation; - save->ov0_base_addr = info->fbLocation; - } - + info->mc_agp_location = 0x003f0000; + } else + info->mc_agp_location = 0xffffffc0; xf86DrvMsg(pScrn->scrnIndex, X_INFO, "RADEONInitMemoryMap() : \n"); xf86DrvMsg(pScrn->scrnIndex, X_INFO, " mem_size : 0x%08x\n", (unsigned)mem_size); xf86DrvMsg(pScrn->scrnIndex, X_INFO, - " MC_FB_LOCATION : 0x%08x\n", (unsigned)save->mc_fb_location); + " MC_FB_LOCATION : 0x%08x\n", (unsigned)info->mc_fb_location); xf86DrvMsg(pScrn->scrnIndex, X_INFO, " MC_AGP_LOCATION : 0x%08x\n", - (unsigned)save->mc_agp_location); + (unsigned)info->mc_agp_location); } static void RADEONGetVRamType(ScrnInfoPtr pScrn) @@ -1308,7 +1319,7 @@ static void RADEONGetVRamType(ScrnInfoPtr pScrn) RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn); unsigned char *RADEONMMIO = info->MMIO; CARD32 tmp; - + if (info->IsIGP || (info->ChipFamily >= CHIP_FAMILY_R300) || (INREG(RADEON_MEM_SDRAM_MODE_REG) & (1<<30))) info->IsDDR = TRUE; @@ -3115,7 +3126,10 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, /* Initialize the memory map, this basically calculates the values * we'll use later on for MC_FB_LOCATION & MC_AGP_LOCATION */ - RADEONInitMemoryMap(pScrn, info->ModeReg); + RADEONInitMemoryMap(pScrn); + + /* copy saved memmap regs to saved mode regs */ + RADEONInitMemMapRegisters(pScrn, info->ModeReg, info); /* write any changes we made */ RADEONRestoreMemMapRegisters(pScrn, info->ModeReg); @@ -3741,28 +3755,21 @@ static void RADEONAdjustMemMapRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save) "DRI init changed memory map, adjusting ...\n"); xf86DrvMsg(pScrn->scrnIndex, X_WARNING, " MC_FB_LOCATION was: 0x%08lx is: 0x%08lx\n", - (long unsigned int)save->mc_fb_location, (long unsigned int)fb); + (long unsigned int)info->mc_fb_location, (long unsigned int)fb); xf86DrvMsg(pScrn->scrnIndex, X_WARNING, " MC_AGP_LOCATION was: 0x%08lx is: 0x%08lx\n", - (long unsigned int)save->mc_agp_location, (long unsigned int)agp); - save->mc_fb_location = fb; - save->mc_agp_location = agp; - save->mc_agp_location_hi = agp_hi; + (long unsigned int)info->mc_agp_location, (long unsigned int)agp); + info->mc_fb_location = fb; + info->mc_agp_location = agp; if (info->ChipFamily >= CHIP_FAMILY_R600) - info->fbLocation = (save->mc_fb_location & 0xffff) << 24; + info->fbLocation = (info->mc_fb_location & 0xffff) << 24; else - info->fbLocation = (save->mc_fb_location & 0xffff) << 16; - - if (!IS_AVIVO_VARIANT) { - save->display_base_addr = info->fbLocation; - save->display2_base_addr = info->fbLocation; - save->ov0_base_addr = info->fbLocation; - } + info->fbLocation = (info->mc_fb_location & 0xffff) << 16; info->dst_pitch_offset = (((pScrn->displayWidth * info->CurrentLayout.pixel_bytes / 64) << 22) | ((info->fbLocation + pScrn->fbOffset) >> 10)); - + RADEONInitMemMapRegisters(pScrn, save, info); RADEONRestoreMemMapRegisters(pScrn, save); } @@ -3796,7 +3803,7 @@ static void RADEONRestoreSurfaces(ScrnInfoPtr pScrn, RADEONSavePtr restore) RADEONInfoPtr info = RADEONPTR(pScrn); unsigned char *RADEONMMIO = info->MMIO; unsigned int surfnr; - + for ( surfnr = 0; surfnr < 8; surfnr++ ) { OUTREG(RADEON_SURFACE0_INFO + 16 * surfnr, restore->surfaces[surfnr][0]); OUTREG(RADEON_SURFACE0_LOWER_BOUND + 16 * surfnr, restore->surfaces[surfnr][1]); @@ -3857,7 +3864,7 @@ void RADEONChangeSurfaces(ScrnInfoPtr pScrn) color_pattern = R300_SURF_TILE_COLOR_MACRO; } else { color_pattern = R200_SURF_TILE_COLOR_MACRO; - } + } #ifdef XF86DRI if (info->directRenderingInited) { drmRadeonSurfaceFree drmsurffree; @@ -3902,7 +3909,7 @@ void RADEONChangeSurfaces(ScrnInfoPtr pScrn) if (retvalue < 0) xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "drm: could not allocate surface for front buffer!\n"); - + if ((info->have3DWindows) && (!info->noBackBuffer)) { drmsurfalloc.address = info->backOffset; retvalue = drmCommandWrite(info->drmFD, DRM_RADEON_SURF_ALLOC, |