more avivo updates

4 files changed, 86 insertions, 53 deletions

diff --git a/src/atombios_crtc.c b/src/atombios_crtc.c
index 125b6dd7..baa8c1be 100644
--- a/src/atombios_crtc.c
+++ b/src/atombios_crtc.c
@@ -17,6 +17,12 @@
 #include "radeon_macros.h"
 #include "radeon_atombios.h"
 
+#ifdef XF86DRI
+#define _XF86DRI_SERVER_
+#include "radeon_dri.h"
+#include "radeon_sarea.h"
+#include "sarea.h"
+#endif
 
 AtomBiosResult
 atombios_enable_crtc(atomBIOSHandlePtr atomBIOS, int crtc, int state)
@@ -348,23 +354,39 @@ atombios_crtc_set_pll(xf86CrtcPtr crtc, DisplayModePtr mode)
 
 void
 atombios_crtc_mode_set(xf86CrtcPtr crtc,
-                   DisplayModePtr mode,
-                   DisplayModePtr adjusted_mode,
-                   int x, int y)
+		       DisplayModePtr mode,
+		       DisplayModePtr adjusted_mode,
+		       int x, int y)
 {
-    ScrnInfoPtr screen_info = crtc->scrn;
+    ScrnInfoPtr pScrn = crtc->scrn;
     RADEONCrtcPrivatePtr radeon_crtc = crtc->driver_private;
-    RADEONInfoPtr  info = RADEONPTR(crtc->scrn);
+    RADEONInfoPtr  info = RADEONPTR(pScrn);
     unsigned char *RADEONMMIO = info->MMIO;
     unsigned long fb_location = crtc->scrn->fbOffset + info->fbLocation;
     int regval;
     AtomBiosResult atom_res;
     RADEONSavePtr restore = &info->ModeReg;
+    Bool           tilingOld   = info->tilingEnabled;
 
     SET_CRTC_TIMING_PARAMETERS_PS_ALLOCATION crtc_timing;
 
     memset(&crtc_timing, 0, sizeof(crtc_timing));
 
+    if (info->allowColorTiling) {
+	info->tilingEnabled = (adjusted_mode->Flags & (V_DBLSCAN | V_INTERLACE)) ? FALSE : TRUE;
+#ifdef XF86DRI
+	if (info->directRenderingEnabled && (info->tilingEnabled != tilingOld)) {
+	    RADEONSAREAPrivPtr pSAREAPriv;
+	    if (RADEONDRISetParam(pScrn, RADEON_SETPARAM_SWITCH_TILING, (info->tilingEnabled ? 1 : 0)) < 0)
+		xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+			   "[drm] failed changing tiling status\n");
+	    /* if this is called during ScreenInit() we don't have pScrn->pScreen yet */
+	    pSAREAPriv = DRIGetSAREAPrivate(screenInfo.screens[pScrn->scrnIndex]);
+	    info->tilingEnabled = pSAREAPriv->tiling_enabled ? TRUE : FALSE;
+	}
+#endif
+    }
+
     crtc_timing.ucCRTC = radeon_crtc->crtc_id;
     crtc_timing.usH_Total = adjusted_mode->CrtcHTotal;
     crtc_timing.usH_Disp = adjusted_mode->CrtcHDisplay;
@@ -387,7 +409,7 @@ atombios_crtc_mode_set(xf86CrtcPtr crtc,
 
     if (IS_AVIVO_VARIANT) {
 	radeon_crtc->fb_width = adjusted_mode->CrtcHDisplay;
-	radeon_crtc->fb_height = screen_info->virtualY;
+	radeon_crtc->fb_height = pScrn->virtualY;
 	radeon_crtc->fb_pitch = adjusted_mode->CrtcHDisplay;
 	radeon_crtc->fb_length = radeon_crtc->fb_pitch * radeon_crtc->fb_height * 4;
 	switch (crtc->scrn->bitsPerPixel) {
@@ -434,5 +456,16 @@ atombios_crtc_mode_set(xf86CrtcPtr crtc,
 
     atombios_crtc_set_pll(crtc, adjusted_mode);
 
+    if (info->tilingEnabled != tilingOld) {
+	/* need to redraw front buffer, I guess this can be considered a hack ? */
+	/* if this is called during ScreenInit() we don't have pScrn->pScreen yet */
+	if (pScrn->pScreen)
+	    xf86EnableDisableFBAccess(pScrn->scrnIndex, FALSE);
+	RADEONChangeSurfaces(pScrn);
+	if (pScrn->pScreen)
+	    xf86EnableDisableFBAccess(pScrn->scrnIndex, TRUE);
+	/* xf86SetRootClip would do, but can't access that here */
+    }
+
 }
 
diff --git a/src/radeon_crtc.c b/src/radeon_crtc.c
index 64e03e1b..397942ae 100644
--- a/src/radeon_crtc.c
+++ b/src/radeon_crtc.c
@@ -54,13 +54,13 @@
 #endif
 
 void radeon_crtc_load_lut(xf86CrtcPtr crtc);
-#if 0
+
 extern void atombios_crtc_mode_set(xf86CrtcPtr crtc,
 				   DisplayModePtr mode,
 				   DisplayModePtr adjusted_mode,
 				   int x, int y);
 extern void atombios_crtc_dpms(xf86CrtcPtr crtc, int mode);
-#endif
+
 static void
 radeon_crtc_dpms(xf86CrtcPtr crtc, int mode)
 {
@@ -70,12 +70,10 @@ radeon_crtc_dpms(xf86CrtcPtr crtc, int mode)
     RADEONInfoPtr info = RADEONPTR(pScrn);
     unsigned char *RADEONMMIO = info->MMIO;
 
-#if 0
-    if (info->IsAtomBios) {
+    if (IS_AVIVO_VARIANT) {
 	atombios_crtc_dpms(crtc, mode);
 	return;
     }
-#endif
 
     mask = radeon_crtc->crtc_id ? (RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_VSYNC_DIS | RADEON_CRTC2_HSYNC_DIS | RADEON_CRTC2_DISP_REQ_EN_B) : (RADEON_CRTC_DISPLAY_DIS | RADEON_CRTC_HSYNC_DIS | RADEON_CRTC_VSYNC_DIS);
 
@@ -799,7 +797,7 @@ radeon_update_tv_routing(ScrnInfoPtr pScrn, RADEONSavePtr restore)
 }
 
 static void
-radeon_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode,
+legacy_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode,
 		     DisplayModePtr adjusted_mode, int x, int y)
 {
     ScrnInfoPtr pScrn = crtc->scrn;
@@ -828,13 +826,6 @@ radeon_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode,
 #endif
     }
 
-#if 0
-    if (info->IsAtomBios) {
-	atombios_crtc_mode_set(crtc, mode, adjusted_mode, x, y);
-	return;
-    }
-#endif
-
     for (i = 0; i < xf86_config->num_output; i++) {
 	xf86OutputPtr output = xf86_config->output[i];
 	RADEONOutputPrivatePtr radeon_output = output->driver_private;
@@ -916,18 +907,18 @@ radeon_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode,
 	ErrorF("restore crtc1\n");
 	RADEONRestoreCrtcRegisters(pScrn, &info->ModeReg);
 	ErrorF("restore pll1\n");
-	if (info->IsAtomBios)
+	/*if (info->IsAtomBios)
 	    atombios_crtc_set_pll(crtc, adjusted_mode);
-	else
+	else*/
 	    RADEONRestorePLLRegisters(pScrn, &info->ModeReg);
 	break;
     case 1:
 	ErrorF("restore crtc2\n");
 	RADEONRestoreCrtc2Registers(pScrn, &info->ModeReg);
 	ErrorF("restore pll2\n");
-	if (info->IsAtomBios)
+	/*if (info->IsAtomBios)
 	    atombios_crtc_set_pll(crtc, adjusted_mode);
-	else
+	else*/
 	    RADEONRestorePLL2Registers(pScrn, &info->ModeReg);
 	break;
     }
@@ -956,6 +947,20 @@ radeon_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode,
 }
 
 static void
+radeon_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode,
+		     DisplayModePtr adjusted_mode, int x, int y)
+{
+    ScrnInfoPtr pScrn = crtc->scrn;
+    RADEONInfoPtr info = RADEONPTR(pScrn);
+
+    if (IS_AVIVO_VARIANT) {
+	atombios_crtc_mode_set(crtc, mode, adjusted_mode, x, y);
+    } else {
+	legacy_crtc_mode_set(crtc, mode, adjusted_mode, x, y);
+    }
+}
+
+static void
 radeon_crtc_mode_commit(xf86CrtcPtr crtc)
 {
     ScrnInfoPtr pScrn = crtc->scrn;
@@ -990,8 +995,13 @@ radeon_crtc_gamma_set(xf86CrtcPtr crtc, CARD16 *red, CARD16 *green,
 {
     RADEONCrtcPrivatePtr radeon_crtc = crtc->driver_private;
     ScrnInfoPtr		pScrn = crtc->scrn;
+    RADEONInfoPtr info = RADEONPTR(pScrn);
     int i, j;
 
+    // fix me
+    if (IS_AVIVO_VARIANT)
+	return;
+
     if (pScrn->depth == 16) {
 	for (i = 0; i < 64; i++) {
 	    if (i <= 31) {
diff --git a/src/radeon_driver.c b/src/radeon_driver.c
index 8fccd886..99144465 100644
--- a/src/radeon_driver.c
+++ b/src/radeon_driver.c
@@ -3470,9 +3470,10 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
 
     RADEONSave(pScrn);
 
-    RADEONDisableDisplays(pScrn);
+    if (!IS_AVIVO_VARIANT)
+	RADEONDisableDisplays(pScrn);
 
-    if (info->IsMobility) {
+    if (info->IsMobility && !IS_AVIVO_VARIANT) {
         if (xf86ReturnOptValBool(info->Options, OPTION_DYNAMIC_CLOCKS, FALSE)) {
 	    RADEONSetDynamicClock(pScrn, 1);
         } else {
diff --git a/src/radeon_output.c b/src/radeon_output.c
index be542a4a..eb1abe43 100644
--- a/src/radeon_output.c
+++ b/src/radeon_output.c
@@ -154,12 +154,11 @@ static RADEONMonitorType radeon_detect_primary_dac(ScrnInfoPtr pScrn, Bool color
 static RADEONMonitorType radeon_detect_tv_dac(ScrnInfoPtr pScrn, Bool color);
 static RADEONMonitorType radeon_detect_ext_dac(ScrnInfoPtr pScrn);
 static void RADEONGetTMDSInfoFromTable(xf86OutputPtr output);
-#if 0
+
 extern void atombios_output_mode_set(xf86OutputPtr output,
 				     DisplayModePtr mode,
 				     DisplayModePtr adjusted_mode);
 extern void atombios_output_dpms(xf86OutputPtr output, int mode);
-#endif
 
 Bool
 RADEONDVOReadByte(I2CDevPtr dvo, int addr, CARD8 *ch)
@@ -715,12 +714,10 @@ radeon_dpms(xf86OutputPtr output, int mode)
     ScrnInfoPtr pScrn  = output->scrn;
     RADEONInfoPtr info = RADEONPTR(pScrn);
 
-#if 0
-    if (info->IsAtomBios) {
+    if (IS_AVIVO_VARIANT) {
 	atombios_output_dpms(output, mode);
 	return;
     }
-#endif
 
     switch(mode) {
     case DPMSModeOn:
@@ -1160,7 +1157,7 @@ RADEONInitOutputRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save,
 }
 
 static void
-radeon_mode_set(xf86OutputPtr output, DisplayModePtr mode,
+legacy_mode_set(xf86OutputPtr output, DisplayModePtr mode,
 		  DisplayModePtr adjusted_mode)
 {
     ScrnInfoPtr	    pScrn = output->scrn;
@@ -1169,15 +1166,6 @@ radeon_mode_set(xf86OutputPtr output, DisplayModePtr mode,
     xf86CrtcPtr	crtc = output->crtc;
     RADEONCrtcPrivatePtr radeon_crtc = crtc->driver_private;
 
-#if 0
-    if (info->IsAtomBios) {
-	ErrorF("AGD: output mode set start\n");
-	atombios_output_mode_set(output, mode, adjusted_mode);
-	ErrorF("AGD: output mode set end\n");
-	return;
-    }
-#endif
-
     RADEONInitOutputRegisters(pScrn, &info->ModeReg, adjusted_mode, output, radeon_crtc->crtc_id);
 
     if (radeon_crtc->crtc_id == 0)
@@ -1209,14 +1197,19 @@ radeon_mode_set(xf86OutputPtr output, DisplayModePtr mode,
 	RADEONRestoreDACRegisters(pScrn, &info->ModeReg);
     }
 
-#if 0
-    if (info->IsAtomBios) {
-	ErrorF("AGD: output mode set start\n");
+}
+
+static void
+radeon_mode_set(xf86OutputPtr output, DisplayModePtr mode,
+		  DisplayModePtr adjusted_mode)
+{
+    ScrnInfoPtr	    pScrn = output->scrn;
+    RADEONInfoPtr info = RADEONPTR(pScrn);
+
+    if (IS_AVIVO_VARIANT)
 	atombios_output_mode_set(output, mode, adjusted_mode);
-	ErrorF("AGD: output mode set end\n");
-	//return;
-    }
-#endif
+    else
+	legacy_mode_set(output, mode, adjusted_mode);
 
 }
 
@@ -1225,12 +1218,8 @@ radeon_mode_commit(xf86OutputPtr output)
 {
     ScrnInfoPtr pScrn  = output->scrn;
     RADEONInfoPtr info = RADEONPTR(pScrn);
-#if 0
-    if (info->IsAtomBios)
-	atombios_output_dpms(output, DPMSModeOn);
-    else
-#endif
-	RADEONEnableDisplay(output, TRUE);
+
+    radeon_dpms(output, DPMSModeOn);
 }
 
 /* the following functions are based on the load detection code