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authorVladimir Dergachev <volodya@mindspring.com>2004-10-04 14:53:11 +0000
committerVladimir Dergachev <volodya@mindspring.com>2004-10-04 14:53:11 +0000
commit4aadb784928ebbd60dce172c9a9a80e8d84e943f (patch)
treeeb1ce961baf676d78e9d8576921f5bc7206288fc
parentdb5a27081d9d3ab4cc1481a7d110d11103b3de19 (diff)
Modified:
xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_video.c This is really embarassing - I found a part of code that had <cr> at the end of the lines. I am certain I never saw it before - talk about code rot !
-rw-r--r--src/radeon_video.c42
1 files changed, 21 insertions, 21 deletions
diff --git a/src/radeon_video.c b/src/radeon_video.c
index c09b9d55..dd1e73a1 100644
--- a/src/radeon_video.c
+++ b/src/radeon_video.c
@@ -942,43 +942,43 @@ static void RADEONSetOverlayAlpha(ScrnInfoPtr pScrn, int ov_alpha, int gr_alpha,
OUTREG(RADEON_OV0_KEY_CNTL,
RADEON_GRAPHIC_KEY_FN_EQ | /* what does this do? */
RADEON_VIDEO_KEY_FN_FALSE | /* what does this do? */
- RADEON_CMP_MIX_OR);
+ RADEON_CMP_MIX_OR);
/* crtc 1 */
OUTREG(RADEON_DISP_MERGE_CNTL,
(RADEON_DISP_ALPHA_MODE_KEY &
- RADEON_DISP_ALPHA_MODE_MASK) |
- ((gr_alpha << 0x00000010) &
- RADEON_DISP_GRPH_ALPHA_MASK) |
- ((ov_alpha << 0x00000018) &
+ RADEON_DISP_ALPHA_MODE_MASK) |
+ ((gr_alpha << 0x00000010) &
+ RADEON_DISP_GRPH_ALPHA_MASK) |
+ ((ov_alpha << 0x00000018) &
RADEON_DISP_OV0_ALPHA_MASK));
/* crtc 2 */
OUTREG(RADEON_DISP2_MERGE_CNTL,
(RADEON_DISP_ALPHA_MODE_KEY &
- RADEON_DISP_ALPHA_MODE_MASK) |
- ((gr_alpha << 0x00000010) &
- RADEON_DISP_GRPH_ALPHA_MASK) |
- ((ov_alpha << 0x00000018) &
+ RADEON_DISP_ALPHA_MODE_MASK) |
+ ((gr_alpha << 0x00000010) &
+ RADEON_DISP_GRPH_ALPHA_MASK) |
+ ((ov_alpha << 0x00000018) &
RADEON_DISP_OV0_ALPHA_MASK));
} else { /* global mode */
OUTREG(RADEON_OV0_KEY_CNTL,
RADEON_GRAPHIC_KEY_FN_FALSE | /* what does this do? */
RADEON_VIDEO_KEY_FN_FALSE | /* what does this do? */
- RADEON_CMP_MIX_AND);
+ RADEON_CMP_MIX_AND);
/* crtc 2 */
- OUTREG(RADEON_DISP2_MERGE_CNTL,
+ OUTREG(RADEON_DISP2_MERGE_CNTL,
(RADEON_DISP_ALPHA_MODE_GLOBAL &
- RADEON_DISP_ALPHA_MODE_MASK) |
- ((gr_alpha << 0x00000010) &
- RADEON_DISP_GRPH_ALPHA_MASK) |
- ((ov_alpha << 0x00000018) &
+ RADEON_DISP_ALPHA_MODE_MASK) |
+ ((gr_alpha << 0x00000010) &
+ RADEON_DISP_GRPH_ALPHA_MASK) |
+ ((ov_alpha << 0x00000018) &
RADEON_DISP_OV0_ALPHA_MASK));
- /* crtc 1 */
- OUTREG(RADEON_DISP_MERGE_CNTL,
+ /* crtc 1 */
+ OUTREG(RADEON_DISP_MERGE_CNTL,
(RADEON_DISP_ALPHA_MODE_GLOBAL &
- RADEON_DISP_ALPHA_MODE_MASK) |
- ((gr_alpha << 0x00000010) &
- RADEON_DISP_GRPH_ALPHA_MASK) |
- ((ov_alpha << 0x00000018) &
+ RADEON_DISP_ALPHA_MODE_MASK) |
+ ((gr_alpha << 0x00000010) &
+ RADEON_DISP_GRPH_ALPHA_MASK) |
+ ((ov_alpha << 0x00000018) &
RADEON_DISP_OV0_ALPHA_MASK));
}
/* per-pixel mode - RADEON_DISP_ALPHA_MODE_PER_PIXEL */