diff options
| author | Michel Daenzer <michel@daenzer.net> | 2006-03-09 15:41:16 +0000 |
|---|---|---|
| committer | Michel Daenzer <michel@daenzer.net> | 2006-03-09 15:41:16 +0000 |
| commit | c637939d3c4ce5cdddbc5200d5ffbca4c3927050 (patch) | |
| tree | 6193fe4be5a13ee361f493a3bc4da0cdb2b6efc6 /ChangeLog | |
| parent | 890b95a3ddad7634f3aea635cb236b221e902acc (diff) | |
RN50: Skip modes that exceed memory bandwidth.
Bugzilla #5766 <https://bugs.freedesktop.org/show_bug.cgi?id=5766> Patch
#4636 <https://bugs.freedesktop.org/attachment.cgi?id=4636>
- Acknowledge that RN50 only has one CRTC, and use this to distinguish it
from RV100.
- Fix detection of RN50 memory type and bus width.
- Model RN50 memory bandwidth limits by capping the pixel clock range based
on memory clock, bpp and memory bus width. (ATI Technologies Inc.)
Diffstat (limited to 'ChangeLog')
| -rw-r--r-- | ChangeLog | 13 |
1 files changed, 13 insertions, 0 deletions
@@ -1,3 +1,16 @@ +2006-03-09 Michel Dänzer <michel@daenzer.net> + + * src/radeon_driver.c: (RADEONGetClockInfo), (RADEONGetVRamType), + (RADEONPreInitConfig): + Bugzilla #5766 <https://bugs.freedesktop.org/show_bug.cgi?id=5766> + Patch #4636 <https://bugs.freedesktop.org/attachment.cgi?id=4636> + - Acknowledge that RN50 only has one CRTC, and use this to distinguish + it from RV100. + - Fix detection of RN50 memory type and bus width. + - Model RN50 memory bandwidth limits by capping the pixel clock range + based on memory clock, bpp and memory bus width. + (ATI Technologies Inc.) + 2006-03-03 Michel Dänzer <michel@daenzer.net> * man/radeon.man: |