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authorAlex Deucher <alexdeucher@gmail.com>2009-04-01 15:23:17 -0400
committerAlex Deucher <alexdeucher@gmail.com>2009-04-15 11:45:52 -0400
commita34a8b37afbea6ed4bf8ca42364195e174250c48 (patch)
treefc84d444215e80d5601329ac82309d44987eba5c /man/radeon.man
parent1f0dc778dc25f4f85fedd73c55c847cab2c79fc5 (diff)
Set default low power PCIE lanes to 2
1 lane seems to cause occasional corruption when blitting to/from gart memory.
Diffstat (limited to 'man/radeon.man')
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