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authorGeorge Sapountzis <gsap7@yahoo.gr>2007-03-18 15:50:41 +0200
committerGeorge Sapountzis <gsap7@yahoo.gr>2007-03-21 20:18:51 +0200
commite674338a98c50800637b8ebc01adf3aec2a3eb38 (patch)
treead6227dbf50f1b7c2a15821374a2426034bd634f /src/atipreinit.c
parente7969de8ec572d8801806f9525a9a081a58a03f1 (diff)
[mach64] Single mapping per BAR.
- We reset write-combining of the FB when MMIO registers fall in the linear aperture. - We set MMIOInLinear in all three aperture mappings since the mapping code depends on it. - We map the linear aperture in its entirety for MMIOInLinear also. This simplifies mapping of HW cursor and the LE aperture on BE archs, as they always fall in the linear aperture. - I assumed that BAR[2] is page-aligned (we know it's 4K-aligned for sure).
Diffstat (limited to 'src/atipreinit.c')
-rw-r--r--src/atipreinit.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/atipreinit.c b/src/atipreinit.c
index 2e5903d1..62bd9267 100644
--- a/src/atipreinit.c
+++ b/src/atipreinit.c
@@ -429,6 +429,8 @@ ATIPreInit
if (pATI->CPIODecoding == BLOCK_IO)
pATI->CPIOBase = pVideo->ioBase[1];
+ pATI->MMIOInLinear = FALSE;
+
/* Set MMIO address from PCI configuration space, if available */
if ((pATI->Block0Base = pVideo->memBase[2]))
{
@@ -451,6 +453,8 @@ ATIPreInit
/* Check tail end of linear (8MB or 4MB) aperture */
if ((pATI->Block0Base = pVideo->memBase[0]))
{
+ pATI->MMIOInLinear = TRUE;
+
pATI->Block0Base += 0x007FFC00U;
ATIMach64Map(pScreenInfo->scrnIndex, pATI);
if (pATI->pBlock[0])
@@ -1808,6 +1812,8 @@ ATIPreInit
{
int AcceleratorVideoRAM = 0, ServerVideoRAM;
+ pATI->MMIOInLinear = FALSE;
+
/*
* Unless specified in PCI configuration space, set MMIO
* address to tail end of linear aperture.