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authorAlex Deucher <alexdeucher@gmail.com>2012-02-10 13:04:59 -0500
committerAlex Deucher <alexdeucher@gmail.com>2012-02-10 17:42:04 -0500
commit7ff277e22c629308915307bbee96eb25ff77f8b9 (patch)
tree7a7f35cb7d87cb5b0a7f295a20ea35ded8f3cb1f /src/drmmode_display.c
parent60b949f34df5db05e0e102cc3daa33469aa50cfc (diff)
radeon: fix crash in drmmode_create_bo_pixmap()
Only init surface on r6xx+. Return NULL rather than FALSE. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=45829 Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Diffstat (limited to 'src/drmmode_display.c')
-rw-r--r--src/drmmode_display.c60
1 files changed, 31 insertions, 29 deletions
diff --git a/src/drmmode_display.c b/src/drmmode_display.c
index 89ac6d7d..7fa89de2 100644
--- a/src/drmmode_display.c
+++ b/src/drmmode_display.c
@@ -71,35 +71,37 @@ static PixmapPtr drmmode_create_bo_pixmap(ScrnInfoPtr pScrn,
exaMoveInPixmap(pixmap);
radeon_set_pixmap_bo(pixmap, bo);
- surface = radeon_get_pixmap_surface(pixmap);
- if (surface) {
- memset(surface, 0, sizeof(struct radeon_surface));
- surface->npix_x = width;
- surface->npix_y = height;
- surface->npix_z = 1;
- surface->blk_w = 1;
- surface->blk_h = 1;
- surface->blk_d = 1;
- surface->array_size = 1;
- surface->last_level = 0;
- surface->bpe = bpp / 8;
- surface->nsamples = 1;
- surface->flags = RADEON_SURF_SCANOUT;
- surface->flags |= RADEON_SURF_SET(RADEON_SURF_TYPE_2D, TYPE);
- surface->flags |= RADEON_SURF_SET(RADEON_SURF_MODE_LINEAR, MODE);
- if (tiling & RADEON_TILING_MICRO) {
- surface->flags = RADEON_SURF_CLR(surface->flags, MODE);
- surface->flags |= RADEON_SURF_SET(RADEON_SURF_MODE_1D, MODE);
- }
- if (tiling & RADEON_TILING_MACRO) {
- surface->flags = RADEON_SURF_CLR(surface->flags, MODE);
- surface->flags |= RADEON_SURF_SET(RADEON_SURF_MODE_2D, MODE);
- }
- if (radeon_surface_best(info->surf_man, surface)) {
- return FALSE;
- }
- if (radeon_surface_init(info->surf_man, surface)) {
- return FALSE;
+ if (info->ChipFamily >= CHIP_FAMILY_R600) {
+ surface = radeon_get_pixmap_surface(pixmap);
+ if (surface) {
+ memset(surface, 0, sizeof(struct radeon_surface));
+ surface->npix_x = width;
+ surface->npix_y = height;
+ surface->npix_z = 1;
+ surface->blk_w = 1;
+ surface->blk_h = 1;
+ surface->blk_d = 1;
+ surface->array_size = 1;
+ surface->last_level = 0;
+ surface->bpe = bpp / 8;
+ surface->nsamples = 1;
+ surface->flags = RADEON_SURF_SCANOUT;
+ surface->flags |= RADEON_SURF_SET(RADEON_SURF_TYPE_2D, TYPE);
+ surface->flags |= RADEON_SURF_SET(RADEON_SURF_MODE_LINEAR, MODE);
+ if (tiling & RADEON_TILING_MICRO) {
+ surface->flags = RADEON_SURF_CLR(surface->flags, MODE);
+ surface->flags |= RADEON_SURF_SET(RADEON_SURF_MODE_1D, MODE);
+ }
+ if (tiling & RADEON_TILING_MACRO) {
+ surface->flags = RADEON_SURF_CLR(surface->flags, MODE);
+ surface->flags |= RADEON_SURF_SET(RADEON_SURF_MODE_2D, MODE);
+ }
+ if (radeon_surface_best(info->surf_man, surface)) {
+ return NULL;
+ }
+ if (radeon_surface_init(info->surf_man, surface)) {
+ return NULL;
+ }
}
}