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| author | Alex Deucher <alexdeucher@gmail.com> | 2011-02-10 14:14:55 -0500 |
|---|---|---|
| committer | Alex Deucher <alexdeucher@gmail.com> | 2011-02-10 14:14:55 -0500 |
| commit | e3145801b80fd4be4cf770128876e86e89bda66f (patch) | |
| tree | ddcc90834c1ed96935b0e93ec65f1f5f4c407b43 /src/evergreen_accel.c | |
| parent | be67ded05621aff9c85525372fd119071d3278ec (diff) | |
evergreen/NI: consolidate spi setup
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Diffstat (limited to 'src/evergreen_accel.c')
| -rw-r--r-- | src/evergreen_accel.c | 29 |
1 files changed, 28 insertions, 1 deletions
diff --git a/src/evergreen_accel.c b/src/evergreen_accel.c index c6c38b2e..ef24e18e 100644 --- a/src/evergreen_accel.c +++ b/src/evergreen_accel.c @@ -327,6 +327,22 @@ void evergreen_cp_wait_vline_sync(ScrnInfoPtr pScrn, PixmapPtr pPix, } void +evergreen_set_spi(ScrnInfoPtr pScrn, int vs_export_count, int num_interp) +{ + RADEONInfoPtr info = RADEONPTR(pScrn); + + BEGIN_BATCH(8); + /* Interpolator setup */ + EREG(SPI_VS_OUT_CONFIG, (vs_export_count << VS_EXPORT_COUNT_shift)); + PACK0(SPI_PS_IN_CONTROL_0, 3); + E32(((num_interp << NUM_INTERP_shift) | + LINEAR_GRADIENT_ENA_bit)); // SPI_PS_IN_CONTROL_0 + E32(0); // SPI_PS_IN_CONTROL_1 + E32(0); // SPI_INTERP_CONTROL_0 + END_BATCH(); +} + +void evergreen_fs_setup(ScrnInfoPtr pScrn, shader_config_t *fs_conf, uint32_t domain) { RADEONInfoPtr info = RADEONPTR(pScrn); @@ -1043,7 +1059,7 @@ evergreen_set_default_state(ScrnInfoPtr pScrn) for (i = 0; i < PA_SC_VPORT_SCISSOR_0_TL_num; i++) evergreen_set_vport_scissor (pScrn, i, 0, 0, 8192, 8192); - BEGIN_BATCH(50); + BEGIN_BATCH(57); PACK0(PA_SC_MODE_CNTL_0, 2); E32(0); // PA_SC_MODE_CNTL_0 E32(0); // PA_SC_MODE_CNTL_1 @@ -1087,6 +1103,17 @@ evergreen_set_default_state(ScrnInfoPtr pScrn) E32(0); E32(0); + /* src = semantic id 0; mask = semantic id 1 */ + EREG(SPI_VS_OUT_ID_0, ((0 << SEMANTIC_0_shift) | + (1 << SEMANTIC_1_shift))); + PACK0(SPI_PS_INPUT_CNTL_0 + (0 << 2), 2); + /* SPI_PS_INPUT_CNTL_0 maps to GPR[0] - load with semantic id 0 */ + E32(((0 << SEMANTIC_shift) | + (0x01 << DEFAULT_VAL_shift))); + /* SPI_PS_INPUT_CNTL_1 maps to GPR[1] - load with semantic id 1 */ + E32(((1 << SEMANTIC_shift) | + (0x01 << DEFAULT_VAL_shift))); + PACK0(SPI_INPUT_Z, 8); E32(0); // SPI_INPUT_Z E32(0); // SPI_FOG_CNTL |