diff options
author | Alex Deucher <alexdeucher@gmail.com> | 2011-04-20 03:10:08 -0400 |
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committer | Alex Deucher <alexdeucher@gmail.com> | 2011-04-20 03:10:08 -0400 |
commit | 903e90c31cf0319be9297529aa7b8daa1756cf63 (patch) | |
tree | fe9e5c104b22d1cda6284fd96fce09339db5166e /src/evergreen_exa.c | |
parent | 982c22f16c8eeee9be81779fbfe17d8d3f9b6897 (diff) |
EXA/Xv: used cached bo tiling flags for accel setup on 6xx+
This avoids calling into the kernel for each bo in the accel
code. This is a follow on to:
cc7d1fa39da40a532fcdbe6c7924ca47a879e66a
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Diffstat (limited to 'src/evergreen_exa.c')
-rw-r--r-- | src/evergreen_exa.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/src/evergreen_exa.c b/src/evergreen_exa.c index d93cb424..d2579399 100644 --- a/src/evergreen_exa.c +++ b/src/evergreen_exa.c @@ -68,6 +68,7 @@ EVERGREENPrepareSolid(PixmapPtr pPix, int alu, Pixel pm, Pixel fg) dst.offset = 0; dst.bo = radeon_get_pixmap_bo(pPix); + dst.tiling_flags = radeon_get_pixmap_tiling(pPix); dst.pitch = exaGetPixmapPitch(pPix) / (pPix->drawable.bitsPerPixel / 8); dst.width = pPix->drawable.width; @@ -448,6 +449,8 @@ EVERGREENPrepareCopy(PixmapPtr pSrc, PixmapPtr pDst, dst_obj.offset = 0; src_obj.bo = radeon_get_pixmap_bo(pSrc); dst_obj.bo = radeon_get_pixmap_bo(pDst); + dst_obj.tiling_flags = radeon_get_pixmap_tiling(pDst); + src_obj.tiling_flags = radeon_get_pixmap_tiling(pSrc); if (radeon_get_pixmap_bo(pSrc) == radeon_get_pixmap_bo(pDst)) accel_state->same_surface = TRUE; @@ -1095,6 +1098,8 @@ static Bool EVERGREENPrepareComposite(int op, PicturePtr pSrcPicture, dst_obj.offset = 0; src_obj.bo = radeon_get_pixmap_bo(pSrc); dst_obj.bo = radeon_get_pixmap_bo(pDst); + dst_obj.tiling_flags = radeon_get_pixmap_tiling(pDst); + src_obj.tiling_flags = radeon_get_pixmap_tiling(pSrc); src_obj.pitch = exaGetPixmapPitch(pSrc) / (pSrc->drawable.bitsPerPixel / 8); dst_obj.pitch = exaGetPixmapPitch(pDst) / (pDst->drawable.bitsPerPixel / 8); @@ -1112,6 +1117,7 @@ static Bool EVERGREENPrepareComposite(int op, PicturePtr pSrcPicture, if (pMask) { mask_obj.offset = 0; mask_obj.bo = radeon_get_pixmap_bo(pMask); + mask_obj.tiling_flags = radeon_get_pixmap_tiling(pMask); mask_obj.pitch = exaGetPixmapPitch(pMask) / (pMask->drawable.bitsPerPixel / 8); mask_obj.width = pMask->drawable.width; @@ -1438,6 +1444,7 @@ EVERGREENUploadToScreen(PixmapPtr pDst, int x, int y, int w, int h, src_obj.bpp = bpp; src_obj.domain = RADEON_GEM_DOMAIN_GTT; src_obj.bo = scratch; + src_obj.tiling_flags = 0; dst_obj.pitch = dst_pitch_hw; dst_obj.width = pDst->drawable.width; @@ -1446,6 +1453,7 @@ EVERGREENUploadToScreen(PixmapPtr pDst, int x, int y, int w, int h, dst_obj.bpp = bpp; dst_obj.domain = RADEON_GEM_DOMAIN_VRAM; dst_obj.bo = radeon_get_pixmap_bo(pDst); + dst_obj.tiling_flags = radeon_get_pixmap_tiling(pDst); if (!R600SetAccelState(pScrn, &src_obj, @@ -1575,6 +1583,7 @@ EVERGREENDownloadFromScreen(PixmapPtr pSrc, int x, int y, int w, src_obj.bpp = bpp; src_obj.domain = RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT; src_obj.bo = radeon_get_pixmap_bo(pSrc); + src_obj.tiling_flags = radeon_get_pixmap_tiling(pSrc); dst_obj.pitch = scratch_pitch; dst_obj.width = w; @@ -1583,6 +1592,7 @@ EVERGREENDownloadFromScreen(PixmapPtr pSrc, int x, int y, int w, dst_obj.bo = scratch; dst_obj.bpp = bpp; dst_obj.domain = RADEON_GEM_DOMAIN_GTT; + dst_obj.tiling_flags = 0; if (!R600SetAccelState(pScrn, &src_obj, |