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authorAlex Deucher <alexdeucher@gmail.com>2008-09-24 11:54:34 -0400
committerAlex Deucher <alexdeucher@gmail.com>2008-09-24 11:54:34 -0400
commitd0d58b39e49c5ce00bc8bd12f721ad8c7f554b91 (patch)
treea2aab099c839a661eae32c1a0a2a5543318386c8 /src/legacy_crtc.c
parentd100a6af8f828eb94f8ba6e8a96c24389b5cf46f (diff)
radeon: Further pll adjustments
Diffstat (limited to 'src/legacy_crtc.c')
-rw-r--r--src/legacy_crtc.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/legacy_crtc.c b/src/legacy_crtc.c
index c16d0a37..89fbb039 100644
--- a/src/legacy_crtc.c
+++ b/src/legacy_crtc.c
@@ -1708,7 +1708,7 @@ legacy_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode,
Bool update_tv_routing = FALSE;
Bool tilingChanged = FALSE;
- if (adjusted_mode->Clock > 120000) /* range limits??? */
+ if (adjusted_mode->Clock > 200000) /* range limits??? */
pll_flags |= RADEON_PLL_PREFER_HIGH_FB_DIV;
else
pll_flags |= RADEON_PLL_PREFER_LOW_REF_DIV;