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authorAlex Deucher <alexdeucher@gmail.com>2009-08-26 02:13:38 -0400
committerAlex Deucher <alexdeucher@gmail.com>2009-08-26 02:13:38 -0400
commite87f0f50f31a59ca1f60d4582d4a57ed00854fb7 (patch)
treeed425cbcf5c2f425701de30e09d2764e9835d951 /src/r600_exa.c
parent3212c26b90c0f6f1a7248b4da3ed985a9c2e9381 (diff)
r6xx/r7xx: set EXA_HANDLES_PIXMAPS
Diffstat (limited to 'src/r600_exa.c')
-rw-r--r--src/r600_exa.c17
1 files changed, 14 insertions, 3 deletions
diff --git a/src/r600_exa.c b/src/r600_exa.c
index f2136aed..cfe041fd 100644
--- a/src/r600_exa.c
+++ b/src/r600_exa.c
@@ -128,7 +128,7 @@ R600PrepareSolid(PixmapPtr pPix, int alu, Pixel pm, Pixel fg)
uint32_t a, r, g, b;
float ps_alu_consts[4];
- return FALSE;
+ //return FALSE;
if (pPix->drawable.bitsPerPixel == 24)
RADEON_FALLBACK(("24bpp unsupported\n"));
@@ -707,7 +707,7 @@ R600PrepareCopy(PixmapPtr pSrc, PixmapPtr pDst,
RADEONInfoPtr info = RADEONPTR(pScrn);
struct radeon_accel_state *accel_state = info->accel_state;
- return FALSE;
+ //return FALSE;
if (pSrc->drawable.bitsPerPixel == 24)
RADEON_FALLBACK(("24bpp unsupported\n"));
@@ -1569,7 +1569,7 @@ static Bool R600PrepareComposite(int op, PicturePtr pSrcPicture,
cb_config_t cb_conf;
shader_config_t vs_conf, ps_conf;
- return FALSE;
+ //return FALSE;
/* return FALSE; */
if (pDst->drawable.bitsPerPixel < 8 || pSrc->drawable.bitsPerPixel < 8)
@@ -2325,6 +2325,17 @@ R600DrawInit(ScreenPtr pScreen)
#ifdef EXA_SUPPORTS_PREPARE_AUX
info->accel_state->exa->flags |= EXA_SUPPORTS_PREPARE_AUX;
#endif
+
+#ifdef XF86DRM_MODE
+#ifdef EXA_HANDLES_PIXMAPS
+ if (info->cs) {
+ info->accel_state->exa->flags |= EXA_HANDLES_PIXMAPS;
+//#ifdef EXA_MIXED_PIXMAPS
+// info->accel_state->exa->flags |= EXA_MIXED_PIXMAPS;
+//#endif
+ }
+#endif
+#endif
info->accel_state->exa->pixmapOffsetAlign = 256;
info->accel_state->exa->pixmapPitchAlign = 256;