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authorMichel Dänzer <michel.daenzer@amd.com>2012-02-08 11:35:35 +0100
committerMichel Dänzer <michel@daenzer.net>2012-02-08 11:36:19 +0100
commit5a7f64c5170ca424c9dca739662018e30df13413 (patch)
treee318cb085c6cdf7ebad5bf71e3c3287fc523b815 /src/r600_textured_videofuncs.c
parent87f776b966f4200c97a989536d4b71822ae4c0b3 (diff)
Fix UMS build failure.
And some UMS specific warnings. Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Diffstat (limited to 'src/r600_textured_videofuncs.c')
-rw-r--r--src/r600_textured_videofuncs.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/r600_textured_videofuncs.c b/src/r600_textured_videofuncs.c
index 8b12cafb..986650a4 100644
--- a/src/r600_textured_videofuncs.c
+++ b/src/r600_textured_videofuncs.c
@@ -187,7 +187,9 @@ R600DisplayTexturedVideo(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv)
src_obj.domain = RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT;
src_obj.bo = pPriv->src_bo[pPriv->currentBuffer];
src_obj.tiling_flags = 0;
+#ifdef XF86DRM_MODE
src_obj.surface = NULL;
+#endif
dst_obj.width = pPixmap->drawable.width;
dst_obj.height = pPixmap->drawable.height;
@@ -272,7 +274,9 @@ R600DisplayTexturedVideo(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv)
tex_res.size = accel_state->src_size[0];
tex_res.bo = accel_state->src_obj[0].bo;
tex_res.mip_bo = accel_state->src_obj[0].bo;
+#ifdef XF86DRM_MODE
tex_res.surface = NULL;
+#endif
tex_res.format = FMT_8;
tex_res.dst_sel_x = SQ_SEL_X; /* Y */
@@ -434,7 +438,9 @@ R600DisplayTexturedVideo(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv)
cb_conf.h = accel_state->dst_obj.height;
cb_conf.base = accel_state->dst_obj.offset;
cb_conf.bo = accel_state->dst_obj.bo;
+#ifdef XF86DRM_MODE
cb_conf.surface = accel_state->dst_obj.surface;
+#endif
switch (accel_state->dst_obj.bpp) {
case 16: