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| author | Alex Deucher <alexdeucher@gmail.com> | 2011-02-10 14:06:38 -0500 |
|---|---|---|
| committer | Alex Deucher <alexdeucher@gmail.com> | 2011-02-10 14:06:38 -0500 |
| commit | be67ded05621aff9c85525372fd119071d3278ec (patch) | |
| tree | d181fed3e3740a83e88ca47fad6f988c5b7bcb7b /src/r600_textured_videofuncs.c | |
| parent | 2c5ae1724307e0dba5d0306fe27c1e15a7390a2f (diff) | |
6xx/7xx: consolidate spi setup
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Diffstat (limited to 'src/r600_textured_videofuncs.c')
| -rw-r--r-- | src/r600_textured_videofuncs.c | 18 |
1 files changed, 1 insertions, 17 deletions
diff --git a/src/r600_textured_videofuncs.c b/src/r600_textured_videofuncs.c index f21d6f26..8eabb082 100644 --- a/src/r600_textured_videofuncs.c +++ b/src/r600_textured_videofuncs.c @@ -444,23 +444,7 @@ R600DisplayTexturedVideo(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv) cb_conf.rop = 3; r600_set_render_target(pScrn, accel_state->ib, &cb_conf, accel_state->dst_obj.domain); - /* Render setup */ - BEGIN_BATCH(14); - /* Interpolator setup */ - /* export tex coords from VS */ - EREG(accel_state->ib, SPI_VS_OUT_CONFIG, ((1 - 1) << VS_EXPORT_COUNT_shift)); - EREG(accel_state->ib, SPI_VS_OUT_ID_0, (0 << SEMANTIC_0_shift)); - EREG(accel_state->ib, SPI_PS_INPUT_CNTL_0 + (0 << 2), ((0 << SEMANTIC_shift) | - (0x03 << DEFAULT_VAL_shift) | - SEL_CENTROID_bit)); - - /* Enabling flat shading needs both FLAT_SHADE_bit in SPI_PS_INPUT_CNTL_x - * *and* FLAT_SHADE_ENA_bit in SPI_INTERP_CONTROL_0 */ - PACK0(accel_state->ib, SPI_PS_IN_CONTROL_0, 3); - E32(accel_state->ib, ((1 << NUM_INTERP_shift))); - E32(accel_state->ib, 0); - E32(accel_state->ib, 0); - END_BATCH(); + r600_set_spi(pScrn, accel_state->ib, (1 - 1), 1); vs_alu_consts[0] = 1.0 / pPriv->w; vs_alu_consts[1] = 1.0 / pPriv->h; |