diff options
| author | Alex Deucher <alexdeucher@gmail.com> | 2011-04-20 03:10:08 -0400 |
|---|---|---|
| committer | Alex Deucher <alexdeucher@gmail.com> | 2011-04-20 03:10:08 -0400 |
| commit | 903e90c31cf0319be9297529aa7b8daa1756cf63 (patch) | |
| tree | fe9e5c104b22d1cda6284fd96fce09339db5166e /src/r600_textured_videofuncs.c | |
| parent | 982c22f16c8eeee9be81779fbfe17d8d3f9b6897 (diff) | |
EXA/Xv: used cached bo tiling flags for accel setup on 6xx+
This avoids calling into the kernel for each bo in the accel
code. This is a follow on to:
cc7d1fa39da40a532fcdbe6c7924ca47a879e66a
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Diffstat (limited to 'src/r600_textured_videofuncs.c')
| -rw-r--r-- | src/r600_textured_videofuncs.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/r600_textured_videofuncs.c b/src/r600_textured_videofuncs.c index 4ff0833e..aab43f3a 100644 --- a/src/r600_textured_videofuncs.c +++ b/src/r600_textured_videofuncs.c @@ -169,6 +169,7 @@ R600DisplayTexturedVideo(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv) dst_obj.offset = 0; src_obj.offset = 0; dst_obj.bo = radeon_get_pixmap_bo(pPixmap); + dst_obj.tiling_flags = radeon_get_pixmap_tiling(pPixmap); } else #endif { @@ -184,7 +185,8 @@ R600DisplayTexturedVideo(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv) src_obj.bpp = 16; src_obj.domain = RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT; src_obj.bo = pPriv->src_bo[pPriv->currentBuffer]; - + src_obj.tiling_flags = 0; + dst_obj.width = pPixmap->drawable.width; dst_obj.height = pPixmap->drawable.height; dst_obj.bpp = pPixmap->drawable.bitsPerPixel; |