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authorAlex Deucher <alexdeucher@gmail.com>2009-02-17 13:14:38 -0500
committerAlex Deucher <alexdeucher@gmail.com>2009-02-17 13:14:38 -0500
commit3dff20e276615e8b77177689a4a5f8d91b3e8eac (patch)
tree5d3392491bdce317ae0aee86ee487ac9de715e3c /src/r6xx_accel.c
parent7cde00f49649e25fd5816927c7a5e28b608fabcd (diff)
R6xx/R7xx EXA: switch to surface sync packet
Diffstat (limited to 'src/r6xx_accel.c')
-rw-r--r--src/r6xx_accel.c15
1 files changed, 5 insertions, 10 deletions
diff --git a/src/r6xx_accel.c b/src/r6xx_accel.c
index c0e3a2bb..bebab883 100644
--- a/src/r6xx_accel.c
+++ b/src/r6xx_accel.c
@@ -365,16 +365,11 @@ cp_set_surface_sync(ScrnInfoPtr pScrn, drmBufPtr ib, uint32_t sync_type, uint32_
else
cp_coher_size = ((size + 255) >> 8);
- ereg (ib, CP_COHER_CNTL, sync_type);
- ereg (ib, CP_COHER_SIZE, cp_coher_size);
- ereg (ib, CP_COHER_BASE, (mc_addr >> 8));
- pack3 (ib, IT_WAIT_REG_MEM, 6);
- e32 (ib, IT_WAIT_REG | IT_WAIT_EQ);
- e32 (ib, IT_WAIT_ADDR(CP_COHER_STATUS));
- e32 (ib, 0);
- e32 (ib, 0); // Ref value
- e32 (ib, STATUS_bit); // Ref mask
- e32 (ib, 10); // Wait interval
+ pack3 (ib, IT_SURFACE_SYNC, 4);
+ e32 (ib, sync_type);
+ e32 (ib, cp_coher_size);
+ e32 (ib, (mc_addr >> 8));
+ e32 (ib, 10); /* poll interval */
}
/* inserts a wait for vline in the command stream */