diff options
author | Michel Daenzer <michel@daenzer.net> | 2004-12-06 06:27:53 +0000 |
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committer | Michel Daenzer <michel@daenzer.net> | 2004-12-06 06:27:53 +0000 |
commit | 2b8ab42b05b32710fa4f71a25e2f84192e637fbd (patch) | |
tree | 9ca947b192ecd009d6e7a08ccde60d95b931bce8 /src/radeon.h | |
parent | 960d15ae3a44efe7c02a3d6d0acbabe63e07be74 (diff) |
When direct rendering is enabled, use hostdata blits to transfer data from
system memory to video RAM, which should reduce CPU usage especially
with larger videos. Can be disabled via Option "DMAForXv" if there
should be any stability issues, but it's been stable for me during a
week of testing. Based on a patch by Nikolaus Meine
<meine@tnt.uni-hannover.de>. Probably fix endianness issues in some
newer XVideo code, untested.
Also use hostdata blits to transfer RENDER image data to video RAM to avoid
idling the accelerator engine. Increases RENDER performance
significantly for me.
These changes were only tested on an M9 in a Titanium PowerBook but should
work with all Radeons where direct rendering is supported.
Diffstat (limited to 'src/radeon.h')
-rw-r--r-- | src/radeon.h | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/src/radeon.h b/src/radeon.h index f22e09e7..098627d4 100644 --- a/src/radeon.h +++ b/src/radeon.h @@ -540,6 +540,8 @@ typedef struct { int irq; + Bool DMAForXv; + #ifdef PER_CONTEXT_SAREA int perctx_sarea_size; #endif @@ -671,6 +673,15 @@ extern void RADEONCPFlushIndirect(ScrnInfoPtr pScrn, int discard); extern void RADEONCPReleaseIndirect(ScrnInfoPtr pScrn); extern int RADEONCPStop(ScrnInfoPtr pScrn, RADEONInfoPtr info); +extern CARD8* RADEONHostDataBlit(ScrnInfoPtr pScrn, unsigned int bpp, + unsigned int w, CARD32 dstPitch, + CARD32 *bufPitch, CARD8 **dst, + unsigned int *h, unsigned int *hpass); +extern void RADEONHostDataBlitCopyPass(CARD8 *dst, CARD8 *src, + unsigned int hpass, + unsigned int dstPitch, + unsigned int srcPitch); + extern Bool RADEONGetBIOSInfo(ScrnInfoPtr pScrn, xf86Int10InfoPtr pInt10); extern Bool RADEONGetConnectorInfoFromBIOS (ScrnInfoPtr pScrn); extern Bool RADEONGetClockInfoFromBIOS (ScrnInfoPtr pScrn); |