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author | Jiří Paleček <jpalecek@web.de> | 2008-06-23 15:53:58 -0400 |
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committer | Alex Deucher <alex@botch2.com> | 2008-06-23 15:53:58 -0400 |
commit | 72feaa37ea07620f5f2ead438dbc72a1c8883cd3 (patch) | |
tree | 239935051ab53d1e6a3d2e871626ae9c86399d71 /src/radeon.h | |
parent | 9c2f909ea437a63a408d2398ecabe0b378dbb982 (diff) |
RADEON: PLL tweaks
Patch from Jiří Paleček (see debian bug 465864) with some tweaks
by me.
- abort rather than programming bad dividers if no pll dividers can be found
- improve the pll selection algorithm
- in general, prefer lower ref dividers
I've tested this patch on a wide variety of chips (r1xx-r6xx) and clocks.
Diffstat (limited to 'src/radeon.h')
-rw-r--r-- | src/radeon.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/radeon.h b/src/radeon.h index cdd84ea7..4f77c3b9 100644 --- a/src/radeon.h +++ b/src/radeon.h @@ -220,7 +220,7 @@ typedef struct { #define RADEON_PLL_NO_ODD_POST_DIV (1 << 1) #define RADEON_PLL_USE_REF_DIV (1 << 2) #define RADEON_PLL_LEGACY (1 << 3) -#define RADEON_PLL_DCE3 (1 << 4) +#define RADEON_PLL_PREFER_LOW_REF_DIV (1 << 4) typedef struct { uint16_t reference_freq; |