diff options
| author | Vladimir Dergachev <volodya@mindspring.com> | 2004-12-12 16:05:35 +0000 |
|---|---|---|
| committer | Vladimir Dergachev <volodya@mindspring.com> | 2004-12-12 16:05:35 +0000 |
| commit | 36b92808e4ff1311f91543388c18cbe8e9eb4aab (patch) | |
| tree | 6db8c8aa8db6cc665e44d832629170e6a4b58d98 /src/radeon_accel.c | |
| parent | 68ea67ce98b8f3ad4c17f987e0e2b92f79a96fbf (diff) | |
Modified:
programs/Xserver/hw/xfree86/drivers/ati/radeon_accel.c
programs/Xserver/hw/xfree86/drivers/ati/radeon_driver.c
programs/Xserver/hw/xfree86/drivers/ati/radeon_dri.c
programs/Xserver/hw/xfree86/drivers/ati/radeon_common.h
programs/Xserver/hw/xfree86/drivers/ati/radeon_version.h Add R300 (and
later) DRM support, protected by X_R300_DRM option.
Note: at the moment this is for 2d support only, if enabled running
glxgears locks up my machine, but DMAForXv=yes works fine.
Diffstat (limited to 'src/radeon_accel.c')
| -rw-r--r-- | src/radeon_accel.c | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/src/radeon_accel.c b/src/radeon_accel.c index ca7124b1..028f2727 100644 --- a/src/radeon_accel.c +++ b/src/radeon_accel.c @@ -168,6 +168,31 @@ void RADEONEngineReset(ScrnInfoPtr pScrn) CARD32 rbbm_soft_reset; CARD32 host_path_cntl; + /* The following RBBM_SOFT_RESET sequence can help un-wedge + * an R300 after the command processor got stuck. + */ + rbbm_soft_reset = INREG(RADEON_RBBM_SOFT_RESET); + OUTREG(RADEON_RBBM_SOFT_RESET, (rbbm_soft_reset | + RADEON_SOFT_RESET_CP | + RADEON_SOFT_RESET_HI | + RADEON_SOFT_RESET_SE | + RADEON_SOFT_RESET_RE | + RADEON_SOFT_RESET_PP | + RADEON_SOFT_RESET_E2 | + RADEON_SOFT_RESET_RB)); + INREG(RADEON_RBBM_SOFT_RESET); + OUTREG(RADEON_RBBM_SOFT_RESET, (rbbm_soft_reset & (CARD32) + ~(RADEON_SOFT_RESET_CP | + RADEON_SOFT_RESET_HI | + RADEON_SOFT_RESET_SE | + RADEON_SOFT_RESET_RE | + RADEON_SOFT_RESET_PP | + RADEON_SOFT_RESET_E2 | + RADEON_SOFT_RESET_RB))); + INREG(RADEON_RBBM_SOFT_RESET); + OUTREG(RADEON_RBBM_SOFT_RESET, rbbm_soft_reset); + INREG(RADEON_RBBM_SOFT_RESET); + RADEONEngineFlush(pScrn); clock_cntl_index = INREG(RADEON_CLOCK_CNTL_INDEX); |