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| author | Matthieu Herrb <matthieu@herrb.eu> | 2024-05-05 14:58:15 +0200 |
|---|---|---|
| committer | Matthieu Herrb <matthieu@herrb.eu> | 2024-05-05 14:58:15 +0200 |
| commit | d873aa20b4638a96a72696598dce4ceb2807c14a (patch) | |
| tree | 037adaa693d86b74e5fc8367e76c96e988056614 /src/radeon_accel.c | |
| parent | c797ffa41b47056ad438bdd24cc00d017acce157 (diff) | |
| parent | 8e5a43d2481cc5e31358f648e3e8adb1f4467dc1 (diff) | |
Merge remote-tracking branch 'origin/master' into obsd
Diffstat (limited to 'src/radeon_accel.c')
| -rw-r--r-- | src/radeon_accel.c | 12 |
1 files changed, 1 insertions, 11 deletions
diff --git a/src/radeon_accel.c b/src/radeon_accel.c index fc80ed74..8d4e76a5 100644 --- a/src/radeon_accel.c +++ b/src/radeon_accel.c @@ -206,23 +206,13 @@ Bool RADEONAccelInit(ScreenPtr pScreen) static void RADEONInit3DEngineInternal(ScrnInfoPtr pScrn) { RADEONInfoPtr info = RADEONPTR(pScrn); - uint32_t gb_tile_config, vap_cntl; + uint32_t vap_cntl; info->accel_state->texW[0] = info->accel_state->texH[0] = info->accel_state->texW[1] = info->accel_state->texH[1] = 1; if (IS_R300_3D || IS_R500_3D) { - gb_tile_config = (R300_ENABLE_TILING | R300_TILE_SIZE_16); - - switch(info->accel_state->num_gb_pipes) { - case 2: gb_tile_config |= R300_PIPE_COUNT_R300; break; - case 3: gb_tile_config |= R300_PIPE_COUNT_R420_3P; break; - case 4: gb_tile_config |= R300_PIPE_COUNT_R420; break; - default: - case 1: gb_tile_config |= R300_PIPE_COUNT_RV350; break; - } - BEGIN_RING(2*3); OUT_RING_REG(R300_RB3D_DSTCACHE_CTLSTAT, R300_DC_FLUSH_3D | R300_DC_FREE_3D); OUT_RING_REG(R300_RB3D_ZCACHE_CTLSTAT, R300_ZC_FLUSH | R300_ZC_FREE); |