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authorAlex Deucher <alexdeucher@gmail.com>2009-05-03 19:42:44 -0400
committerAlex Deucher <alexdeucher@gmail.com>2009-05-03 19:42:44 -0400
commita1c64ea5224009779ccad66b0f84d861eae966ac (patch)
treee47e8f3a798596c0e28ec5e8841e0e7a71e926e5 /src/radeon_accel.c
parent3880bc3c95764acccd62cfa438932458df95daf6 (diff)
r3xx-r5xx: switch to 1/12 subpixel precision
- based on similar patch in Jerome's cs ddx tree - also fix clipping offsets - should eventually allow for 4k render targets - mesa driver uses 1/12 mode, this avoids changing the subpixel mode when switching between ddx and mesa
Diffstat (limited to 'src/radeon_accel.c')
-rw-r--r--src/radeon_accel.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/radeon_accel.c b/src/radeon_accel.c
index 70347fe9..f90b3864 100644
--- a/src/radeon_accel.c
+++ b/src/radeon_accel.c
@@ -493,7 +493,7 @@ void RADEONEngineInit(ScrnInfoPtr pScrn)
"num quad-pipes is %d\n", info->accel_state->num_gb_pipes);
if (IS_R300_3D || IS_R500_3D) {
- uint32_t gb_tile_config = (R300_ENABLE_TILING | R300_TILE_SIZE_16 | R300_SUBPIXEL_1_16);
+ uint32_t gb_tile_config = (R300_ENABLE_TILING | R300_TILE_SIZE_16);
switch(info->accel_state->num_gb_pipes) {
case 2: gb_tile_config |= R300_PIPE_COUNT_R300; break;