diff options
| author | Matt Turner <mattst88@gmail.com> | 2010-02-24 22:46:27 -0500 |
|---|---|---|
| committer | Alex Deucher <alexdeucher@gmail.com> | 2010-02-26 14:50:15 -0500 |
| commit | c7e81d2f3a372e0d5f751dd0c5091aec2b56d936 (patch) | |
| tree | c522aedca79e673e29f93a18c4c19f74ae2337bb /src/radeon_accel.c | |
| parent | c0a5c9403dff254e1669df606a4193794270aeff (diff) | |
Use/define RADEON_GPU_PAGE_SIZE instead of sprinkling 4096 everywhere.
Also, define RADEON_BUFFER_ALIGN in terms of it, and replace some
RADEON_ALIGN(x, RADEON_BUFFER_ALIGN) with RADEON_ALIGN(x,
RADEON_GPU_PAGE_SIZE) since this is really what was intended.
CC: Jerome Glisse <jglisse@redhat.com>
CC: Alex Deucher <alexdeucher@gmail.com>
CC: Dave Airlie <airlied@redhat.com>
Signed-off-by: Matt Turner <mattst88@gmail.com>
Diffstat (limited to 'src/radeon_accel.c')
| -rw-r--r-- | src/radeon_accel.c | 27 |
1 files changed, 12 insertions, 15 deletions
diff --git a/src/radeon_accel.c b/src/radeon_accel.c index f0d94c30..9bf8f3c7 100644 --- a/src/radeon_accel.c +++ b/src/radeon_accel.c @@ -1157,11 +1157,11 @@ RADEONSetupMemXAA_DRI(int scrnIndex, ScreenPtr pScreen) * Might need that for non-XF86DRI too? */ if (info->allowColorTiling) { - bufferSize = (((pScrn->virtualY + 15) & ~15) * width_bytes - + RADEON_BUFFER_ALIGN) & ~RADEON_BUFFER_ALIGN; + bufferSize = RADEON_ALIGN(((pScrn->virtualY + 15) & ~15) * width_bytes, + RADEON_GPU_PAGE_SIZE); } else { - bufferSize = (pScrn->virtualY * width_bytes - + RADEON_BUFFER_ALIGN) & ~RADEON_BUFFER_ALIGN; + bufferSize = RADEON_ALIGN(pScrn->virtualY * width_bytes, + RADEON_GPU_PAGE_SIZE); } /* Due to tiling, the Z buffer pitch must be a multiple of 32 pixels, @@ -1169,8 +1169,8 @@ RADEONSetupMemXAA_DRI(int scrnIndex, ScreenPtr pScreen) * but not necessarily otherwise, and its height a multiple of 16 lines. */ info->dri->depthPitch = (pScrn->displayWidth + 31) & ~31; - depthSize = ((((pScrn->virtualY + 15) & ~15) * info->dri->depthPitch - * depthCpp + RADEON_BUFFER_ALIGN) & ~RADEON_BUFFER_ALIGN); + depthSize = RADEON_ALIGN(((pScrn->virtualY + 15) & ~15) * info->dri->depthPitch + * depthCpp, RADEON_GPU_PAGE_SIZE); xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Using %d MB GART aperture\n", info->dri->gartSize); @@ -1277,25 +1277,22 @@ RADEONSetupMemXAA_DRI(int scrnIndex, ScreenPtr pScreen) } else { /* Reserve space for textures */ - info->dri->textureOffset = ((info->FbMapSize - info->dri->textureSize + - RADEON_BUFFER_ALIGN) & - ~(uint32_t)RADEON_BUFFER_ALIGN); + info->dri->textureOffset = RADEON_ALIGN(info->FbMapSize - info->dri->textureSize, + RADEON_GPU_PAGE_SIZE); } /* Reserve space for the shared depth * buffer. */ - info->dri->depthOffset = ((info->dri->textureOffset - depthSize + - RADEON_BUFFER_ALIGN) & - ~(uint32_t)RADEON_BUFFER_ALIGN); + info->dri->depthOffset = RADEON_ALIGN(info->dri->textureOffset - depthSize, + RADEON_GPU_PAGE_SIZE); /* Reserve space for the shared back buffer */ if (info->dri->noBackBuffer) { info->dri->backOffset = info->dri->depthOffset; } else { - info->dri->backOffset = ((info->dri->depthOffset - bufferSize + - RADEON_BUFFER_ALIGN) & - ~(uint32_t)RADEON_BUFFER_ALIGN); + info->dri->backOffset = RADEON_ALIGN(info->dri->depthOffset - bufferSize, + RADEON_GPU_PAGE_SIZE); } info->dri->backY = info->dri->backOffset / width_bytes; |