diff options
author | Alex Deucher <alexdeucher@gmail.com> | 2009-02-19 21:18:07 -0500 |
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committer | Alex Deucher <alexdeucher@gmail.com> | 2009-02-19 21:18:07 -0500 |
commit | 27f8ca2cce65be2bcb3375231886d5444d251808 (patch) | |
tree | c2ed403242c3a3daa8fba10c866512872dda5a21 /src/radeon_accel.c | |
parent | e6475282486f4895bc68f6b093ecbb1aa6d25f72 (diff) |
R6xx/R7xx: add wait for idle MMIO path
Diffstat (limited to 'src/radeon_accel.c')
-rw-r--r-- | src/radeon_accel.c | 34 |
1 files changed, 33 insertions, 1 deletions
diff --git a/src/radeon_accel.c b/src/radeon_accel.c index 2b17cd15..dffbc576 100644 --- a/src/radeon_accel.c +++ b/src/radeon_accel.c @@ -93,6 +93,7 @@ /* X and server generic header files */ #include "xf86.h" +static void R600EngineReset(ScrnInfoPtr pScrn); #ifdef USE_XAA static struct { @@ -150,6 +151,37 @@ void RADEONWaitForFifoFunction(ScrnInfoPtr pScrn, int entries) } } +void R600WaitForFifoFunction(ScrnInfoPtr pScrn, int entries) +{ + RADEONInfoPtr info = RADEONPTR(pScrn); + unsigned char *RADEONMMIO = info->MMIO; + int i; + + for (;;) { + for (i = 0; i < RADEON_TIMEOUT; i++) { + if (info->ChipFamily >= CHIP_FAMILY_RV770) + info->accel_state->fifo_slots = + INREG(R600_GRBM_STATUS) & R700_CMDFIFO_AVAIL_MASK; + else + info->accel_state->fifo_slots = + INREG(R600_GRBM_STATUS) & R600_CMDFIFO_AVAIL_MASK; + if (info->accel_state->fifo_slots >= entries) return; + } + xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG, + "FIFO timed out: stat=0x%08x\n", + (unsigned int)INREG(R600_GRBM_STATUS)); + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "FIFO timed out, resetting engine...\n"); + R600EngineReset(pScrn); +#ifdef XF86DRI + if (info->directRenderingEnabled) { + RADEONCP_RESET(pScrn, info); + RADEONCP_START(pScrn, info); + } +#endif + } +} + /* Flush all dirty data in the Pixel Cache to memory */ void RADEONEngineFlush(ScrnInfoPtr pScrn) { @@ -307,7 +339,7 @@ void RADEONEngineReset(ScrnInfoPtr pScrn) } /* Reset graphics card to known state */ -void R600EngineReset(ScrnInfoPtr pScrn) +static void R600EngineReset(ScrnInfoPtr pScrn) { RADEONInfoPtr info = RADEONPTR(pScrn); unsigned char *RADEONMMIO = info->MMIO; |