diff options
| author | Michel Dänzer <michel@tungstengraphics.com> | 2006-06-15 15:35:05 +0200 |
|---|---|---|
| committer | Michel Dänzer <michel@tungstengraphics.com> | 2006-06-15 15:35:05 +0200 |
| commit | 56bd5a370472663af5607cd327f757367b238db0 (patch) | |
| tree | a37aa14384447f10b8ff8c2615ef3503b4f7da17 /src/radeon_accel.c | |
| parent | ec93e08b24f7c0e583970d08bfe18ad142e6b047 (diff) | |
Fix some more cosmetic warnings.
Diffstat (limited to 'src/radeon_accel.c')
| -rw-r--r-- | src/radeon_accel.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/radeon_accel.c b/src/radeon_accel.c index 4c4a0f61..b18b6d49 100644 --- a/src/radeon_accel.c +++ b/src/radeon_accel.c @@ -133,7 +133,7 @@ void RADEONWaitForFifoFunction(ScrnInfoPtr pScrn, int entries) INREG(RADEON_RBBM_STATUS) & RADEON_RBBM_FIFOCNT_MASK; if (info->fifo_slots >= entries) return; } - RADEONTRACE(("FIFO timed out: %ld entries, stat=0x%08lx\n", + RADEONTRACE(("FIFO timed out: %u entries, stat=0x%08x\n", INREG(RADEON_RBBM_STATUS) & RADEON_RBBM_FIFOCNT_MASK, INREG(RADEON_RBBM_STATUS))); xf86DrvMsg(pScrn->scrnIndex, X_ERROR, @@ -164,7 +164,7 @@ void RADEONEngineFlush(ScrnInfoPtr pScrn) break; } if (i == RADEON_TIMEOUT) { - RADEONTRACE(("DC flush timeout: %lx\n", + RADEONTRACE(("DC flush timeout: %x\n", INREG(RADEON_RB3D_DSTCACHE_CTLSTAT))); } } |