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authorAlex Deucher <alexdeucher@gmail.com>2009-05-03 19:42:44 -0400
committerAlex Deucher <alexdeucher@gmail.com>2009-05-03 19:42:44 -0400
commita1c64ea5224009779ccad66b0f84d861eae966ac (patch)
treee47e8f3a798596c0e28ec5e8841e0e7a71e926e5 /src/radeon_commonfuncs.c
parent3880bc3c95764acccd62cfa438932458df95daf6 (diff)
r3xx-r5xx: switch to 1/12 subpixel precision
- based on similar patch in Jerome's cs ddx tree - also fix clipping offsets - should eventually allow for 4k render targets - mesa driver uses 1/12 mode, this avoids changing the subpixel mode when switching between ddx and mesa
Diffstat (limited to 'src/radeon_commonfuncs.c')
-rw-r--r--src/radeon_commonfuncs.c40
1 files changed, 20 insertions, 20 deletions
diff --git a/src/radeon_commonfuncs.c b/src/radeon_commonfuncs.c
index 3dbe6173..ba358ab6 100644
--- a/src/radeon_commonfuncs.c
+++ b/src/radeon_commonfuncs.c
@@ -69,7 +69,7 @@ static void FUNC_NAME(RADEONInit3DEngine)(ScrnInfoPtr pScrn)
OUT_ACCEL_REG(RADEON_WAIT_UNTIL, RADEON_WAIT_2D_IDLECLEAN | RADEON_WAIT_3D_IDLECLEAN);
FINISH_ACCEL();
- gb_tile_config = (R300_ENABLE_TILING | R300_TILE_SIZE_16 | R300_SUBPIXEL_1_16);
+ gb_tile_config = (R300_ENABLE_TILING | R300_TILE_SIZE_16);
switch(info->accel_state->num_gb_pipes) {
case 2: gb_tile_config |= R300_PIPE_COUNT_R300; break;
@@ -105,21 +105,21 @@ static void FUNC_NAME(RADEONInit3DEngine)(ScrnInfoPtr pScrn)
OUT_ACCEL_REG(R300_GB_AA_CONFIG, 0);
OUT_ACCEL_REG(R300_RB3D_DSTCACHE_CTLSTAT, R300_DC_FLUSH_3D | R300_DC_FREE_3D);
OUT_ACCEL_REG(R300_RB3D_ZCACHE_CTLSTAT, R300_ZC_FLUSH | R300_ZC_FREE);
- OUT_ACCEL_REG(R300_GB_MSPOS0, ((8 << R300_MS_X0_SHIFT) |
- (8 << R300_MS_Y0_SHIFT) |
- (8 << R300_MS_X1_SHIFT) |
- (8 << R300_MS_Y1_SHIFT) |
- (8 << R300_MS_X2_SHIFT) |
- (8 << R300_MS_Y2_SHIFT) |
- (8 << R300_MSBD0_Y_SHIFT) |
- (7 << R300_MSBD0_X_SHIFT)));
- OUT_ACCEL_REG(R300_GB_MSPOS1, ((8 << R300_MS_X3_SHIFT) |
- (8 << R300_MS_Y3_SHIFT) |
- (8 << R300_MS_X4_SHIFT) |
- (8 << R300_MS_Y4_SHIFT) |
- (8 << R300_MS_X5_SHIFT) |
- (8 << R300_MS_Y5_SHIFT) |
- (8 << R300_MSBD1_SHIFT)));
+ OUT_ACCEL_REG(R300_GB_MSPOS0, ((6 << R300_MS_X0_SHIFT) |
+ (6 << R300_MS_Y0_SHIFT) |
+ (6 << R300_MS_X1_SHIFT) |
+ (6 << R300_MS_Y1_SHIFT) |
+ (6 << R300_MS_X2_SHIFT) |
+ (6 << R300_MS_Y2_SHIFT) |
+ (6 << R300_MSBD0_Y_SHIFT) |
+ (6 << R300_MSBD0_X_SHIFT)));
+ OUT_ACCEL_REG(R300_GB_MSPOS1, ((6 << R300_MS_X3_SHIFT) |
+ (6 << R300_MS_Y3_SHIFT) |
+ (6 << R300_MS_X4_SHIFT) |
+ (6 << R300_MS_Y4_SHIFT) |
+ (6 << R300_MS_X5_SHIFT) |
+ (6 << R300_MS_Y5_SHIFT) |
+ (6 << R300_MSBD1_SHIFT)));
FINISH_ACCEL();
BEGIN_ACCEL(5);
@@ -552,10 +552,10 @@ static void FUNC_NAME(RADEONInit3DEngine)(ScrnInfoPtr pScrn)
OUT_ACCEL_REG(R300_SC_EDGERULE, 0xA5294A5);
if (IS_R300_3D) {
/* clip has offset 1440 */
- OUT_ACCEL_REG(R300_SC_CLIP_0_A, ((1088 << R300_CLIP_X_SHIFT) |
- (1088 << R300_CLIP_Y_SHIFT)));
- OUT_ACCEL_REG(R300_SC_CLIP_0_B, (((1080 + 2920) << R300_CLIP_X_SHIFT) |
- ((1080 + 2920) << R300_CLIP_Y_SHIFT)));
+ OUT_ACCEL_REG(R300_SC_CLIP_0_A, ((1440 << R300_CLIP_X_SHIFT) |
+ (1440 << R300_CLIP_Y_SHIFT)));
+ OUT_ACCEL_REG(R300_SC_CLIP_0_B, ((4080 << R300_CLIP_X_SHIFT) |
+ (4080 << R300_CLIP_Y_SHIFT)));
} else {
OUT_ACCEL_REG(R300_SC_CLIP_0_A, ((0 << R300_CLIP_X_SHIFT) |
(0 << R300_CLIP_Y_SHIFT)));