diff options
author | Alex Deucher <alex@samba.(none)> | 2008-02-24 05:30:11 -0500 |
---|---|---|
committer | Alex Deucher <alex@samba.(none)> | 2008-02-24 05:30:11 -0500 |
commit | 27ddb39b12a0b54e099fd5274c4c91f08e2d2822 (patch) | |
tree | b09c583ecc4dd067ff1de562c3800b25295d0ca7 /src/radeon_commonfuncs.c | |
parent | d4c20f33ad6a1f88615cd7e09ad3638896873f9e (diff) |
R300: clean up magic numbers in RADEONInit3DEngine
Diffstat (limited to 'src/radeon_commonfuncs.c')
-rw-r--r-- | src/radeon_commonfuncs.c | 160 |
1 files changed, 104 insertions, 56 deletions
diff --git a/src/radeon_commonfuncs.c b/src/radeon_commonfuncs.c index 8635dc04..b8236a77 100644 --- a/src/radeon_commonfuncs.c +++ b/src/radeon_commonfuncs.c @@ -65,9 +65,11 @@ static void FUNC_NAME(RADEONInit3DEngine)(ScrnInfoPtr pScrn) FINISH_ACCEL(); BEGIN_ACCEL(3); - OUT_ACCEL_REG(R300_GB_TILE_CONFIG, 0x10011); - OUT_ACCEL_REG(R300_GB_SELECT,0x0); - OUT_ACCEL_REG(R300_GB_ENABLE, 0x0); + OUT_ACCEL_REG(R300_GB_TILE_CONFIG, (R300_ENABLE_TILING | + R300_TILE_SIZE_16 | + R300_SUBPIXEL_1_16)); + OUT_ACCEL_REG(R300_GB_SELECT, 0); + OUT_ACCEL_REG(R300_GB_ENABLE, 0); FINISH_ACCEL(); BEGIN_ACCEL(3); @@ -77,84 +79,130 @@ static void FUNC_NAME(RADEONInit3DEngine)(ScrnInfoPtr pScrn) FINISH_ACCEL(); BEGIN_ACCEL(5); - OUT_ACCEL_REG(R300_GB_AA_CONFIG, 0x0); + OUT_ACCEL_REG(R300_GB_AA_CONFIG, 0); OUT_ACCEL_REG(R300_RB3D_DSTCACHE_CTLSTAT, R300_DC_FLUSH_3D | R300_DC_FREE_3D); OUT_ACCEL_REG(R300_RB3D_ZCACHE_CTLSTAT, R300_ZC_FLUSH | R300_ZC_FREE); - OUT_ACCEL_REG(R300_GB_MSPOS0, 0x78888888); - OUT_ACCEL_REG(R300_GB_MSPOS1, 0x08888888); + OUT_ACCEL_REG(R300_GB_MSPOS0, ((8 << R300_MS_X0_SHIFT) | + (8 << R300_MS_Y0_SHIFT) | + (8 << R300_MS_X1_SHIFT) | + (8 << R300_MS_Y1_SHIFT) | + (8 << R300_MS_X2_SHIFT) | + (8 << R300_MS_Y2_SHIFT) | + (8 << R300_MSBD0_Y_SHIFT) | + (7 << R300_MSBD0_X_SHIFT))); + OUT_ACCEL_REG(R300_GB_MSPOS1, ((8 << R300_MS_X3_SHIFT) | + (8 << R300_MS_Y3_SHIFT) | + (8 << R300_MS_X4_SHIFT) | + (8 << R300_MS_Y4_SHIFT) | + (8 << R300_MS_X5_SHIFT) | + (8 << R300_MS_Y5_SHIFT) | + (8 << R300_MSBD1_SHIFT))); FINISH_ACCEL(); BEGIN_ACCEL(4); - OUT_ACCEL_REG(R300_GA_POLY_MODE, 0x120); - OUT_ACCEL_REG(R300_GA_ROUND_MODE, 0x5); - OUT_ACCEL_REG(R300_GA_COLOR_CONTROL, 0xAAAA); - OUT_ACCEL_REG(R300_GA_OFFSET, 0x0); + OUT_ACCEL_REG(R300_GA_POLY_MODE, R300_FRONT_PTYPE_TRIANGE | R300_BACK_PTYPE_TRIANGE); + OUT_ACCEL_REG(R300_GA_ROUND_MODE, (R300_GEOMETRY_ROUND_NEAREST | + R300_COLOR_ROUND_NEAREST)); + OUT_ACCEL_REG(R300_GA_COLOR_CONTROL, (R300_RGB0_SHADING_GOURAND | + R300_ALPHA0_SHADING_GOURAND | + R300_RGB1_SHADING_GOURAND | + R300_ALPHA1_SHADING_GOURAND | + R300_RGB2_SHADING_GOURAND | + R300_ALPHA2_SHADING_GOURAND | + R300_RGB3_SHADING_GOURAND | + R300_ALPHA3_SHADING_GOURAND)); + OUT_ACCEL_REG(R300_GA_OFFSET, 0); FINISH_ACCEL(); BEGIN_ACCEL(5); - OUT_ACCEL_REG(R300_SU_TEX_WRAP, 0x0); - OUT_ACCEL_REG(R300_SU_POLY_OFFSET_ENABLE, 0x0); - OUT_ACCEL_REG(R300_SU_CULL_MODE, 0x4); + OUT_ACCEL_REG(R300_SU_TEX_WRAP, 0); + OUT_ACCEL_REG(R300_SU_POLY_OFFSET_ENABLE, 0); + OUT_ACCEL_REG(R300_SU_CULL_MODE, R300_FACE_NEG); OUT_ACCEL_REG(R300_SU_DEPTH_SCALE, 0x4b7fffff); - OUT_ACCEL_REG(R300_SU_DEPTH_OFFSET, 0x0); + OUT_ACCEL_REG(R300_SU_DEPTH_OFFSET, 0); FINISH_ACCEL(); BEGIN_ACCEL(5); - OUT_ACCEL_REG(R300_US_W_FMT, 0x0); - OUT_ACCEL_REG(R300_US_OUT_FMT_1, 0x1B0F); - OUT_ACCEL_REG(R300_US_OUT_FMT_2, 0x1B0F); - OUT_ACCEL_REG(R300_US_OUT_FMT_3, 0x1B0F); - OUT_ACCEL_REG(R300_US_OUT_FMT_0, 0x1B01); + OUT_ACCEL_REG(R300_US_W_FMT, 0); + OUT_ACCEL_REG(R300_US_OUT_FMT_1, (R300_OUT_FMT_UNUSED | + R300_OUT_FMT_C0_SEL_BLUE | + R300_OUT_FMT_C1_SEL_GREEN | + R300_OUT_FMT_C2_SEL_RED | + R300_OUT_FMT_C3_SEL_ALPHA)); + OUT_ACCEL_REG(R300_US_OUT_FMT_2, (R300_OUT_FMT_UNUSED | + R300_OUT_FMT_C0_SEL_BLUE | + R300_OUT_FMT_C1_SEL_GREEN | + R300_OUT_FMT_C2_SEL_RED | + R300_OUT_FMT_C3_SEL_ALPHA)); + OUT_ACCEL_REG(R300_US_OUT_FMT_3, (R300_OUT_FMT_UNUSED | + R300_OUT_FMT_C0_SEL_BLUE | + R300_OUT_FMT_C1_SEL_GREEN | + R300_OUT_FMT_C2_SEL_RED | + R300_OUT_FMT_C3_SEL_ALPHA)); + OUT_ACCEL_REG(R300_US_OUT_FMT_0, (R300_OUT_FMT_C4_10 | + R300_OUT_FMT_C0_SEL_BLUE | + R300_OUT_FMT_C1_SEL_GREEN | + R300_OUT_FMT_C2_SEL_RED | + R300_OUT_FMT_C3_SEL_ALPHA)); FINISH_ACCEL(); BEGIN_ACCEL(3); - OUT_ACCEL_REG(R300_FG_DEPTH_SRC, 0x0); - OUT_ACCEL_REG(R300_FG_FOG_BLEND, 0x0); - OUT_ACCEL_REG(R300_FG_ALPHA_FUNC, 0x0); + OUT_ACCEL_REG(R300_FG_DEPTH_SRC, 0); + OUT_ACCEL_REG(R300_FG_FOG_BLEND, 0); + OUT_ACCEL_REG(R300_FG_ALPHA_FUNC, 0); FINISH_ACCEL(); BEGIN_ACCEL(12); - OUT_ACCEL_REG(R300_RB3D_ZSTENCILCNTL, 0x0); + OUT_ACCEL_REG(R300_RB3D_ZSTENCILCNTL, 0); OUT_ACCEL_REG(R300_RB3D_ZCACHE_CTLSTAT, R300_ZC_FLUSH | R300_ZC_FREE); - OUT_ACCEL_REG(R300_RB3D_BW_CNTL, 0x0); - OUT_ACCEL_REG(R300_RB3D_ZCNTL, 0x0); - OUT_ACCEL_REG(R300_RB3D_ZTOP, 0x0); - OUT_ACCEL_REG(R300_RB3D_ROPCNTL, 0x0); + OUT_ACCEL_REG(R300_RB3D_BW_CNTL, 0); + OUT_ACCEL_REG(R300_RB3D_ZCNTL, 0); + OUT_ACCEL_REG(R300_RB3D_ZTOP, 0); + OUT_ACCEL_REG(R300_RB3D_ROPCNTL, 0); - OUT_ACCEL_REG(R300_RB3D_AARESOLVE_CTL, 0x0); - OUT_ACCEL_REG(R300_RB3D_COLOR_CHANNEL_MASK, 0xf); + OUT_ACCEL_REG(R300_RB3D_AARESOLVE_CTL, 0); + OUT_ACCEL_REG(R300_RB3D_COLOR_CHANNEL_MASK, (R300_BLUE_MASK_EN | + R300_GREEN_MASK_EN | + R300_RED_MASK_EN | + R300_ALPHA_MASK_EN)); OUT_ACCEL_REG(R300_RB3D_DSTCACHE_CTLSTAT, R300_DC_FLUSH_3D | R300_DC_FREE_3D); - OUT_ACCEL_REG(R300_RB3D_CCTL, 0x0); - OUT_ACCEL_REG(R300_RB3D_DITHER_CTL, 0x0); + OUT_ACCEL_REG(R300_RB3D_CCTL, 0); + OUT_ACCEL_REG(R300_RB3D_DITHER_CTL, 0); OUT_ACCEL_REG(R300_RB3D_DSTCACHE_CTLSTAT, R300_DC_FLUSH_3D | R300_DC_FREE_3D); FINISH_ACCEL(); BEGIN_ACCEL(7); OUT_ACCEL_REG(R300_SC_EDGERULE, 0xA5294A5); - OUT_ACCEL_REG(R300_SC_SCISSOR0, 0x0); - OUT_ACCEL_REG(R300_SC_SCISSOR1, 0x3ffffff); + OUT_ACCEL_REG(R300_SC_SCISSOR0, ((0 << R300_SCISSOR_X_SHIFT) | + (0 << R300_SCISSOR_Y_SHIFT))); + OUT_ACCEL_REG(R300_SC_SCISSOR1, ((8191 << R300_SCISSOR_X_SHIFT) | + (8191 << R300_SCISSOR_Y_SHIFT))); if (IS_AVIVO_VARIANT) { - OUT_ACCEL_REG(R300_SC_CLIP_0_A, 0x0); - OUT_ACCEL_REG(R300_SC_CLIP_0_B, 0xff0ff0); + OUT_ACCEL_REG(R300_SC_CLIP_0_A, ((0 << R300_CLIP_X_SHIFT) | + (0 << R300_CLIP_Y_SHIFT))); + OUT_ACCEL_REG(R300_SC_CLIP_0_B, ((4080 << R300_CLIP_X_SHIFT) | + (2040 << R300_CLIP_Y_SHIFT))); } else { - OUT_ACCEL_REG(R300_SC_CLIP_0_A, 0x880440); - OUT_ACCEL_REG(R300_SC_CLIP_0_B, 0xff0ff0); + OUT_ACCEL_REG(R300_SC_CLIP_0_A, ((1088 << R300_CLIP_X_SHIFT) | + (1088 << R300_CLIP_Y_SHIFT))); + OUT_ACCEL_REG(R300_SC_CLIP_0_B, ((4080 << R300_CLIP_X_SHIFT) | + (2040 << R300_CLIP_Y_SHIFT))); } OUT_ACCEL_REG(R300_SC_CLIP_RULE, 0xAAAA); OUT_ACCEL_REG(R300_SC_SCREENDOOR, 0xffffff); FINISH_ACCEL(); - } else if ((info->ChipFamily == CHIP_FAMILY_RV250) || - (info->ChipFamily == CHIP_FAMILY_RV280) || - (info->ChipFamily == CHIP_FAMILY_RS300) || + } else if ((info->ChipFamily == CHIP_FAMILY_RV250) || + (info->ChipFamily == CHIP_FAMILY_RV280) || + (info->ChipFamily == CHIP_FAMILY_RS300) || (info->ChipFamily == CHIP_FAMILY_R200)) { BEGIN_ACCEL(7); - if (info->ChipFamily == CHIP_FAMILY_RS300) { - OUT_ACCEL_REG(R200_SE_VAP_CNTL_STATUS, RADEON_TCL_BYPASS); - } else { - OUT_ACCEL_REG(R200_SE_VAP_CNTL_STATUS, 0); - } + if (info->ChipFamily == CHIP_FAMILY_RS300) { + OUT_ACCEL_REG(R200_SE_VAP_CNTL_STATUS, RADEON_TCL_BYPASS); + } else { + OUT_ACCEL_REG(R200_SE_VAP_CNTL_STATUS, 0); + } OUT_ACCEL_REG(R200_PP_CNTL_X, 0); OUT_ACCEL_REG(R200_PP_TXMULTI_CTL_0, 0); OUT_ACCEL_REG(R200_SE_VTX_STATE_CNTL, 0); @@ -165,11 +213,11 @@ static void FUNC_NAME(RADEONInit3DEngine)(ScrnInfoPtr pScrn) FINISH_ACCEL(); } else { BEGIN_ACCEL(2); - if ((info->ChipFamily == CHIP_FAMILY_RADEON) || - (info->ChipFamily == CHIP_FAMILY_RV200)) - OUT_ACCEL_REG(RADEON_SE_CNTL_STATUS, 0); - else - OUT_ACCEL_REG(RADEON_SE_CNTL_STATUS, RADEON_TCL_BYPASS); + if ((info->ChipFamily == CHIP_FAMILY_RADEON) || + (info->ChipFamily == CHIP_FAMILY_RV200)) + OUT_ACCEL_REG(RADEON_SE_CNTL_STATUS, 0); + else + OUT_ACCEL_REG(RADEON_SE_CNTL_STATUS, RADEON_TCL_BYPASS); OUT_ACCEL_REG(RADEON_SE_COORD_FMT, RADEON_VTX_XY_PRE_MULT_1_OVER_W0 | RADEON_VTX_ST0_NONPARAMETRIC | @@ -183,12 +231,12 @@ static void FUNC_NAME(RADEONInit3DEngine)(ScrnInfoPtr pScrn) OUT_ACCEL_REG(RADEON_RE_WIDTH_HEIGHT, 0x07ff07ff); OUT_ACCEL_REG(RADEON_AUX_SC_CNTL, 0); OUT_ACCEL_REG(RADEON_RB3D_PLANEMASK, 0xffffffff); - OUT_ACCEL_REG(RADEON_SE_CNTL, RADEON_DIFFUSE_SHADE_GOURAUD | - RADEON_BFACE_SOLID | - RADEON_FFACE_SOLID | - RADEON_VTX_PIX_CENTER_OGL | - RADEON_ROUND_MODE_ROUND | - RADEON_ROUND_PREC_4TH_PIX); + OUT_ACCEL_REG(RADEON_SE_CNTL, (RADEON_DIFFUSE_SHADE_GOURAUD | + RADEON_BFACE_SOLID | + RADEON_FFACE_SOLID | + RADEON_VTX_PIX_CENTER_OGL | + RADEON_ROUND_MODE_ROUND | + RADEON_ROUND_PREC_4TH_PIX)); FINISH_ACCEL(); } |