diff options
author | Alex Deucher <alex@samba.(none)> | 2008-02-23 19:06:30 -0500 |
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committer | Alex Deucher <alex@samba.(none)> | 2008-02-23 19:06:30 -0500 |
commit | d9be9f34b0d3313e7b22b2a8bb0a8924ad3116bf (patch) | |
tree | 4dd3416086a3dc9b063bd8b245be973cd9fd903f /src/radeon_commonfuncs.c | |
parent | 9dc4acad79196e9d5d94dd710773bfa83456d47f (diff) |
RADEON: add textured video support for r1xx-r4xx radeons
Based on the kdrive ati video code by Eric Anholt.
R3xx/R4xx still have some clipping issues in certain situations
Diffstat (limited to 'src/radeon_commonfuncs.c')
-rw-r--r-- | src/radeon_commonfuncs.c | 33 |
1 files changed, 0 insertions, 33 deletions
diff --git a/src/radeon_commonfuncs.c b/src/radeon_commonfuncs.c index 8c4b598c..629336f0 100644 --- a/src/radeon_commonfuncs.c +++ b/src/radeon_commonfuncs.c @@ -91,39 +91,6 @@ static void FUNC_NAME(RADEONInit3DEngine)(ScrnInfoPtr pScrn) OUT_ACCEL_REG(R300_GA_OFFSET, 0x0); FINISH_ACCEL(); - BEGIN_ACCEL(26); - OUT_ACCEL_REG(R300_VAP_CNTL_STATUS, 0x0); - OUT_ACCEL_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0); - OUT_ACCEL_REG(R300_VAP_CNTL, 0x300456); - OUT_ACCEL_REG(R300_VAP_VTE_CNTL, 0x300); - OUT_ACCEL_REG(R300_VAP_PSC_SGN_NORM_CNTL, 0x0); - OUT_ACCEL_REG(R300_VAP_PROG_STREAM_CNTL_0, 0x4a014001); - OUT_ACCEL_REG(R300_VAP_PROG_STREAM_CNTL_1, 0x6b01); - OUT_ACCEL_REG(R300_VAP_PROG_STREAM_CNTL_EXT_0, 0xf688f688); - OUT_ACCEL_REG(R300_VAP_PROG_STREAM_CNTL_EXT_1, 0xf688); - OUT_ACCEL_REG(R300_VAP_PVS_CODE_CNTL_0, 0x100400); - OUT_ACCEL_REG(R300_VAP_PVS_CODE_CNTL_1, 0x1); - OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_INDX_REG, 0); - OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG,0x00f00203); - OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG,0x00d10001); - OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG,0x01248001); - OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG,0x01248001); - OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG,0x00f02203); - OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG,0x00d10141); - OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG,0x01248141); - OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG,0x01248141); - - OUT_ACCEL_REG(R300_VAP_PVS_FLOW_CNTL_OPC, 0x0); - OUT_ACCEL_REG(R300_VAP_OUT_VTX_FMT_0, 0x1); - OUT_ACCEL_REG(R300_VAP_OUT_VTX_FMT_1, (0x2 << 3) | 0x2); - - OUT_ACCEL_REG(R300_VAP_GB_VERT_CLIP_ADJ, 0x3f800000); - OUT_ACCEL_REG(R300_VAP_GB_VERT_DISC_ADJ, 0x3f800000); - OUT_ACCEL_REG(R300_VAP_GB_HORZ_CLIP_ADJ, 0x3f800000); - OUT_ACCEL_REG(R300_VAP_GB_HORZ_DISC_ADJ, 0x3f800000); - OUT_ACCEL_REG(R300_VAP_CLIP_CNTL, 0x10000); - FINISH_ACCEL(); - BEGIN_ACCEL(7); OUT_ACCEL_REG(R300_SU_TEX_WRAP, 0x0); OUT_ACCEL_REG(R300_SU_POLY_OFFSET_ENABLE, 0x0); |