diff options
| author | Alex Deucher <alex@samba.(none)> | 2007-11-29 02:52:14 -0500 |
|---|---|---|
| committer | Alex Deucher <alex@samba.(none)> | 2007-11-29 02:52:14 -0500 |
| commit | 017c939cf0a2b12fbdc1681cc70c28b23ae3b397 (patch) | |
| tree | 11a9a54251115e2959c55faf61bb5c9fac090f0b /src/radeon_crtc.c | |
| parent | 9963b0fe01feb6dd0cb555b874a48f6fa3b255cb (diff) | |
RADEON: implement CLUT adjust support
Diffstat (limited to 'src/radeon_crtc.c')
| -rw-r--r-- | src/radeon_crtc.c | 22 |
1 files changed, 17 insertions, 5 deletions
diff --git a/src/radeon_crtc.c b/src/radeon_crtc.c index 9192a9e4..c4a5d116 100644 --- a/src/radeon_crtc.c +++ b/src/radeon_crtc.c @@ -980,8 +980,25 @@ void radeon_crtc_load_lut(xf86CrtcPtr crtc) if (!crtc->enabled) return; + if (IS_AVIVO_VARIANT) { + OUTREG(AVIVO_DC_LUTA_CONTROL + radeon_crtc->crtc_offset, 0); + + OUTREG(AVIVO_DC_LUTA_BLACK_OFFSET_BLUE + radeon_crtc->crtc_offset, 0); + OUTREG(AVIVO_DC_LUTA_BLACK_OFFSET_GREEN + radeon_crtc->crtc_offset, 0); + OUTREG(AVIVO_DC_LUTA_BLACK_OFFSET_RED + radeon_crtc->crtc_offset, 0); + + OUTREG(AVIVO_DC_LUTA_WHITE_OFFSET_BLUE + radeon_crtc->crtc_offset, 0x0000ffff); + OUTREG(AVIVO_DC_LUTA_WHITE_OFFSET_GREEN + radeon_crtc->crtc_offset, 0x0000ffff); + OUTREG(AVIVO_DC_LUTA_WHITE_OFFSET_RED + radeon_crtc->crtc_offset, 0x0000ffff); + } + PAL_SELECT(radeon_crtc->crtc_id); + if (IS_AVIVO_VARIANT) { + OUTREG(AVIVO_DC_LUT_RW_MODE, 0); + OUTREG(AVIVO_DC_LUT_WRITE_EN_MASK, 0x0000003f); + } + for (i = 0; i < 256; i++) { OUTPAL(i, radeon_crtc->lut_r[i], radeon_crtc->lut_g[i], radeon_crtc->lut_b[i]); } @@ -995,13 +1012,8 @@ radeon_crtc_gamma_set(xf86CrtcPtr crtc, CARD16 *red, CARD16 *green, { RADEONCrtcPrivatePtr radeon_crtc = crtc->driver_private; ScrnInfoPtr pScrn = crtc->scrn; - RADEONInfoPtr info = RADEONPTR(pScrn); int i, j; - // fix me - if (IS_AVIVO_VARIANT) - return; - if (pScrn->depth == 16) { for (i = 0; i < 64; i++) { if (i <= 31) { |