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authorLisa Wu <liswu@ati.com>2007-08-08 00:05:47 -0400
committerAlex Deucher <alex@botch2.com>2007-08-08 00:05:47 -0400
commit5c3f49e651c36f3bd14fa29359e24825d8f7f77f (patch)
tree26355fc7173564783029f7205781186da1a41528 /src/radeon_crtc.c
parent08fe7ad00fba523775e95b5e6295fe23a5119d60 (diff)
RADEON: make sure RADEON_CRTC2_CRT2_ON bit state is properly accounted for
- when the TV DAC is used for crtc1 make sure to keep this bit set when initializing crtc2. - fixes bug 11894
Diffstat (limited to 'src/radeon_crtc.c')
-rw-r--r--src/radeon_crtc.c34
1 files changed, 20 insertions, 14 deletions
diff --git a/src/radeon_crtc.c b/src/radeon_crtc.c
index cbb50d8e..cf67400b 100644
--- a/src/radeon_crtc.c
+++ b/src/radeon_crtc.c
@@ -565,20 +565,26 @@ RADEONInitCrtc2Registers(xf86CrtcPtr crtc, RADEONSavePtr save,
((pScrn->bitsPerPixel * 8) -1)) / (pScrn->bitsPerPixel * 8);
save->crtc2_pitch |= save->crtc2_pitch << 16;
- save->crtc2_gen_cntl = (RADEON_CRTC2_EN
- | (format << 8)
- | RADEON_CRTC2_VSYNC_DIS
- | RADEON_CRTC2_HSYNC_DIS
- | RADEON_CRTC2_DISP_DIS
- | ((mode->Flags & V_DBLSCAN)
- ? RADEON_CRTC2_DBL_SCAN_EN
- : 0)
- | ((mode->Flags & V_CSYNC)
- ? RADEON_CRTC2_CSYNC_EN
- : 0)
- | ((mode->Flags & V_INTERLACE)
- ? RADEON_CRTC2_INTERLACE_EN
- : 0));
+ /* check to see if TV_DAC is enabled for another output and keep it enabled */
+ if (save->crtc2_gen_cntl & RADEON_CRTC2_CRT2_ON)
+ save->crtc2_gen_cntl = RADEON_CRTC2_CRT2_ON;
+ else
+ save->crtc2_gen_cntl = 0;
+
+ save->crtc2_gen_cntl |= (RADEON_CRTC2_EN
+ | (format << 8)
+ | RADEON_CRTC2_VSYNC_DIS
+ | RADEON_CRTC2_HSYNC_DIS
+ | RADEON_CRTC2_DISP_DIS
+ | ((mode->Flags & V_DBLSCAN)
+ ? RADEON_CRTC2_DBL_SCAN_EN
+ : 0)
+ | ((mode->Flags & V_CSYNC)
+ ? RADEON_CRTC2_CSYNC_EN
+ : 0)
+ | ((mode->Flags & V_INTERLACE)
+ ? RADEON_CRTC2_INTERLACE_EN
+ : 0));
save->disp2_merge_cntl = info->SavedReg.disp2_merge_cntl;
save->disp2_merge_cntl &= ~(RADEON_DISP2_RGB_OFFSET_EN);