diff options
| author | Alex Deucher <alex@botch2.com> | 2007-07-29 15:23:14 -0400 |
|---|---|---|
| committer | Alex Deucher <alex@botch2.com> | 2007-07-29 15:23:14 -0400 |
| commit | 6b9b7a7bdc290d07de9b226691ec8025af8db896 (patch) | |
| tree | ad5ec5300554d97a871b4552425b4bd7edac8ca1 /src/radeon_crtc.c | |
| parent | 8d043db1817d94edeb72ab208dfea60026715d48 (diff) | |
RADEON: Initial pass at integrated tv out support
Based on the GATOS tv-out support by Federico Ulivi <fulivi@lycos.com>
and information from ati with substantial rework by myself.
Code is not actually hooked up yet.
Diffstat (limited to 'src/radeon_crtc.c')
| -rw-r--r-- | src/radeon_crtc.c | 25 |
1 files changed, 22 insertions, 3 deletions
diff --git a/src/radeon_crtc.c b/src/radeon_crtc.c index 3518c9c0..cbb50d8e 100644 --- a/src/radeon_crtc.c +++ b/src/radeon_crtc.c @@ -753,6 +753,8 @@ radeon_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode, ScrnInfoPtr pScrn = crtc->scrn; xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn); RADEONCrtcPrivatePtr radeon_crtc = crtc->driver_private; + xf86OutputPtr output; + RADEONOutputPrivatePtr radeon_output; RADEONInfoPtr info = RADEONPTR(pScrn); RADEONMonitorType montype = MT_NONE; Bool tilingOld = info->tilingEnabled; @@ -775,8 +777,8 @@ radeon_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode, } for (i = 0; i < xf86_config->num_output; i++) { - xf86OutputPtr output = xf86_config->output[i]; - RADEONOutputPrivatePtr radeon_output = output->driver_private; + output = xf86_config->output[i]; + radeon_output = output->driver_private; if (output->crtc == crtc) { montype = radeon_output->MonType; @@ -816,7 +818,20 @@ radeon_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode, } break; } - + + if (montype == MT_STV || montype == MT_CTV) { + switch (radeon_crtc->crtc_id) { + case 0: + RADEONAdjustCrtcRegistersForTV(pScrn, &info->ModeReg, adjusted_mode, output); + RADEONAdjustPLLRegistersForTV(pScrn, &info->ModeReg, adjusted_mode, output); + break; + case 1: + RADEONAdjustCrtc2RegistersForTV(pScrn, &info->ModeReg, adjusted_mode, output); + RADEONAdjustPLL2RegistersForTV(pScrn, &info->ModeReg, adjusted_mode, output); + break; + } + } + ErrorF("restore memmap\n"); RADEONRestoreMemMapRegisters(pScrn, &info->ModeReg); ErrorF("restore common\n"); @@ -837,6 +852,10 @@ radeon_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode, break; } + /* pixclks_cntl handles tv-out clock routing */ + if (montype == MT_STV || montype == MT_CTV) + RADEONRestorePLL2Registers(pScrn, &info->ModeReg); + if (info->DispPriority) RADEONInitDispBandwidth(pScrn); |