diff options
| author | Alex Deucher <alexdeucher@gmail.com> | 2010-04-13 11:08:59 -0400 |
|---|---|---|
| committer | Alex Deucher <alexdeucher@gmail.com> | 2010-04-13 11:08:59 -0400 |
| commit | 22a46dddd375b2b9399e12fdf168fa5292ff17a4 (patch) | |
| tree | 8227b869aad03913f3add76fde3d8ad69c64174b /src/radeon_crtc.c | |
| parent | c1b817c45477c21234abaaebe78feb7ea4fd92b1 (diff) | |
radeon: add support for pll algo selection
tv-out on atom systems is very particular about it's
dividers. force it to use the old algo.
Should fix fdo bug 27593.
Diffstat (limited to 'src/radeon_crtc.c')
| -rw-r--r-- | src/radeon_crtc.c | 37 |
1 files changed, 15 insertions, 22 deletions
diff --git a/src/radeon_crtc.c b/src/radeon_crtc.c index 0b071b8b..a4a3302b 100644 --- a/src/radeon_crtc.c +++ b/src/radeon_crtc.c @@ -447,7 +447,7 @@ done: } void -RADEONComputePLL(ScrnInfoPtr pScrn, +RADEONComputePLL(xf86CrtcPtr crtc, RADEONPLLPtr pll, unsigned long freq, uint32_t *chosen_dot_clock_freq, @@ -457,28 +457,21 @@ RADEONComputePLL(ScrnInfoPtr pScrn, uint32_t *chosen_post_div, int flags) { - RADEONInfoPtr info = RADEONPTR(pScrn); + RADEONCrtcPrivatePtr radeon_crtc = crtc->driver_private; - if (IS_AVIVO_VARIANT) { - if (xf86ReturnOptValBool(info->Options, OPTION_NEW_PLL, TRUE)) { - /* disable frac fb dividers */ - flags &= ~RADEON_PLL_USE_FRAC_FB_DIV; - RADEONComputePLL_new(pll, freq, chosen_dot_clock_freq, - chosen_feedback_div, chosen_frac_feedback_div, - chosen_reference_div, chosen_post_div, flags); - } else - RADEONComputePLL_old(pll, freq, chosen_dot_clock_freq, - chosen_feedback_div, chosen_frac_feedback_div, - chosen_reference_div, chosen_post_div, flags); - } else { - if (xf86ReturnOptValBool(info->Options, OPTION_NEW_PLL, FALSE)) - RADEONComputePLL_new(pll, freq, chosen_dot_clock_freq, - chosen_feedback_div, chosen_frac_feedback_div, - chosen_reference_div, chosen_post_div, flags); - else - RADEONComputePLL_old(pll, freq, chosen_dot_clock_freq, - chosen_feedback_div, chosen_frac_feedback_div, - chosen_reference_div, chosen_post_div, flags); + switch (radeon_crtc->pll_algo) { + case RADEON_PLL_OLD: + RADEONComputePLL_old(pll, freq, chosen_dot_clock_freq, + chosen_feedback_div, chosen_frac_feedback_div, + chosen_reference_div, chosen_post_div, flags); + break; + case RADEON_PLL_NEW: + /* disable frac fb dividers */ + flags &= ~RADEON_PLL_USE_FRAC_FB_DIV; + RADEONComputePLL_new(pll, freq, chosen_dot_clock_freq, + chosen_feedback_div, chosen_frac_feedback_div, + chosen_reference_div, chosen_post_div, flags); + break; } } |